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amd,radv: add ac_emit_cp_indirect_buffer()

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/37956>
This commit is contained in:
Samuel Pitoiset 2025-10-20 10:11:41 +02:00 • committed by Marge Bot
parent 3efe8ec16b
commit 0fb21e2299
3 changed files with 32 additions and 8 deletions
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20
src/amd/common/ac_cmdbuf_cp.c
View file

@ -13,6 +13,26 @@
#include "amd_family.h"
#include "sid.h"
void
ac_emit_cp_indirect_buffer(struct ac_cmdbuf *cs, uint64_t va, uint32_t cdw,
enum ac_cp_indirect_buffer_flags flags,
bool predicate)
{
uint32_t dword2_flags = 0;
if (flags & AC_CP_INDIRECT_BUFFER_CHAIN)
dword2_flags |= S_3F2_CHAIN(1);
if (flags & AC_CP_INDIRECT_BUFFER_VALID)
dword2_flags |= S_3F2_VALID(1);
ac_cmdbuf_begin(cs);
ac_cmdbuf_emit(PKT3(PKT3_INDIRECT_BUFFER, 2, predicate));
ac_cmdbuf_emit(va);
ac_cmdbuf_emit(va >> 32);
ac_cmdbuf_emit(cdw | dword2_flags);
ac_cmdbuf_end();
}
void
ac_emit_cp_cond_exec(struct ac_cmdbuf *cs, enum amd_gfx_level gfx_level,
uint64_t va, uint32_t count)

10
src/amd/common/ac_cmdbuf_cp.h
View file

@ -21,6 +21,16 @@ extern "C" {
struct ac_cmdbuf;
struct radeon_info;
enum ac_cp_indirect_buffer_flags {
AC_CP_INDIRECT_BUFFER_CHAIN = 1u << 0,
AC_CP_INDIRECT_BUFFER_VALID = 1u << 1,
};
void
ac_emit_cp_indirect_buffer(struct ac_cmdbuf *cs, uint64_t va, uint32_t cdw,
enum ac_cp_indirect_buffer_flags flags,
bool predicate);
void
ac_emit_cp_cond_exec(struct ac_cmdbuf *cs, enum amd_gfx_level gfx_level,
uint64_t va, uint32_t count);

10
src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
View file

@ -769,10 +769,7 @@ radv_amdgpu_cs_emit_secondary_ib2(struct radv_amdgpu_cs *parent, struct radv_amd
const uint32_t size = child->ib_buffers[i].cdw;
/* Not setting the CHAIN bit will launch an IB2. */
radeon_emit(&parent->base, PKT3(PKT3_INDIRECT_BUFFER, 2, 0));
radeon_emit(&parent->base, va);
radeon_emit(&parent->base, va >> 32);
radeon_emit(&parent->base, size);
ac_emit_cp_indirect_buffer(&parent->base, va, size, 0, false);
assert(parent->base.cdw <= parent->base.max_dw);
}
@ -842,10 +839,7 @@ radv_amdgpu_cs_execute_ib(struct ac_cmdbuf *_cs, struct radeon_winsys_bo *bo, ui
assert(ib_va && ib_va % cs->ws->info.ip[cs->hw_ip].ib_alignment == 0);
assert(cs->hw_ip == AMD_IP_GFX && cdw <= ~C_3F2_IB_SIZE);
radeon_emit(&cs->base, PKT3(PKT3_INDIRECT_BUFFER, 2, predicate));
radeon_emit(&cs->base, ib_va);
radeon_emit(&cs->base, ib_va >> 32);
radeon_emit(&cs->base, cdw);
ac_emit_cp_indirect_buffer(&cs->base, ib_va, cdw, 0, predicate);
}
static void