From 0f5d8ed998c1f7708ddd805aafb0132970508ac5 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 3 Oct 2025 11:28:13 +0200 Subject: [PATCH] radv: reserve more CS space when executing DGC calls This can trigger an assert otherwise. The space reserved before executing DGC IBs is an arbitrary number which should be large enough in all cases. Found this while implementing descriptor heap. Cc: mesa-stable Signed-off-by: Samuel Pitoiset Part-of: (cherry picked from commit 874bc0953772eee519c48052cc81eb211917f09c) --- .pick_status.json | 2 +- src/amd/vulkan/radv_cmd_buffer.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/.pick_status.json b/.pick_status.json index 953c0b919c4..220571880a4 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -5214,7 +5214,7 @@ "description": "radv: reserve more CS space when executing DGC calls", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": null, "notes": null diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index 9de90e40212..095995d443b 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -12108,6 +12108,8 @@ radv_dgc_execute_ib(struct radv_cmd_buffer *cmd_buffer, const VkGeneratedCommand const uint64_t main_ib_va = ib_va + radv_get_indirect_main_cmdbuf_offset(pGeneratedCommandsInfo); const uint64_t main_trailer_va = ib_va + radv_get_indirect_main_trailer_offset(pGeneratedCommandsInfo); + radeon_check_space(device->ws, cmd_buffer->cs, 64); + device->ws->cs_chain_dgc_ib(cmd_buffer->cs, main_ib_va, cmdbuf_size >> 2, main_trailer_va, cmd_buffer->state.predicating); @@ -12208,6 +12210,8 @@ radv_CmdExecuteGeneratedCommandsEXT(VkCommandBuffer commandBuffer, VkBool32 isPr } if (!radv_cmd_buffer_uses_mec(cmd_buffer)) { + radeon_check_space(device->ws, cmd_buffer->cs, 2); + radeon_begin(cmd_buffer->cs); radeon_emit(PKT3(PKT3_PFP_SYNC_ME, 0, cmd_buffer->state.predicating)); radeon_emit(0);