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nir: Fix unaligned pointer access
This was observed with the intel vulkan driver when running dEQP-VK.spirv_assembly.instruction.compute.float32.comparison_1.modfstruct with ubsan enabled. Reviewed-by: Rhys Perry <pendingchaos02@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6728>
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1 changed files with 9 additions and 6 deletions
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@ -717,21 +717,24 @@ write_dest(write_ctx *ctx, const nir_dest *dst, union packed_instr header,
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if (ctx->last_instr_type == nir_instr_type_alu) {
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assert(ctx->last_alu_header_offset);
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union packed_instr *last_header =
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(union packed_instr *)(ctx->blob->data +
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ctx->last_alu_header_offset);
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union packed_instr last_header;
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memcpy(&last_header, ctx->blob->data + ctx->last_alu_header_offset,
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sizeof(last_header));
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/* Clear the field that counts ALUs with equal headers. */
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union packed_instr clean_header;
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clean_header.u32 = last_header->u32;
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clean_header.u32 = last_header.u32;
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clean_header.alu.num_followup_alu_sharing_header = 0;
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/* There can be at most 4 consecutive ALU instructions
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* sharing the same header.
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*/
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if (last_header->alu.num_followup_alu_sharing_header < 3 &&
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if (last_header.alu.num_followup_alu_sharing_header < 3 &&
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header.u32 == clean_header.u32) {
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last_header->alu.num_followup_alu_sharing_header++;
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last_header.alu.num_followup_alu_sharing_header++;
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memcpy(ctx->blob->data + ctx->last_alu_header_offset,
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&last_header, sizeof(last_header));
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equal_header = true;
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}
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}
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