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freedreno/a6xx: Share shader_t_to_opcode
We have a similar function in fd6_program.c. Move to fd6_emit.h and share. Reviewed-by: Rob Clark <robdclark@gmail.com> Reviewed-by: Eric Anholt <eric@anholt.net>
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3 changed files with 21 additions and 35 deletions
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@ -45,24 +45,6 @@
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#include "fd6_format.h"
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#include "fd6_zsa.h"
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static uint32_t
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shader_t_to_opcode(gl_shader_stage type)
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{
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switch (type) {
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case MESA_SHADER_VERTEX:
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case MESA_SHADER_TESS_CTRL:
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case MESA_SHADER_TESS_EVAL:
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case MESA_SHADER_GEOMETRY:
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return CP_LOAD_STATE6_GEOM;
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case MESA_SHADER_FRAGMENT:
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case MESA_SHADER_COMPUTE:
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case MESA_SHADER_KERNEL:
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return CP_LOAD_STATE6_FRAG;
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default:
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unreachable("bad shader type");
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}
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}
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/* regid: base const register
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* prsc or dwords: buffer containing constant values
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* sizedwords: size of const value buffer
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@ -87,7 +69,7 @@ fd6_emit_const(struct fd_ringbuffer *ring, gl_shader_stage type,
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align_sz = align(sz, 4);
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OUT_PKT7(ring, shader_t_to_opcode(type), 3 + align_sz);
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OUT_PKT7(ring, fd6_stage2opcode(type), 3 + align_sz);
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OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(regid/4) |
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CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS) |
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CP_LOAD_STATE6_0_STATE_SRC(src) |
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@ -121,7 +103,7 @@ fd6_emit_const_bo(struct fd_ringbuffer *ring, gl_shader_stage type, boolean writ
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debug_assert((regid % 4) == 0);
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OUT_PKT7(ring, shader_t_to_opcode(type), 3 + (2 * anum));
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OUT_PKT7(ring, fd6_stage2opcode(type), 3 + (2 * anum));
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OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(regid/4) |
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CP_LOAD_STATE6_0_STATE_TYPE(ST6_CONSTANTS)|
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CP_LOAD_STATE6_0_STATE_SRC(SS6_DIRECT) |
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@ -186,6 +186,24 @@ fd6_emit_lrz_flush(struct fd_ringbuffer *ring)
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OUT_RING(ring, LRZ_FLUSH);
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}
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static inline uint32_t
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fd6_stage2opcode(gl_shader_stage type)
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{
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switch (type) {
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case MESA_SHADER_VERTEX:
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case MESA_SHADER_TESS_CTRL:
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case MESA_SHADER_TESS_EVAL:
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case MESA_SHADER_GEOMETRY:
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return CP_LOAD_STATE6_GEOM;
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case MESA_SHADER_FRAGMENT:
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case MESA_SHADER_COMPUTE:
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case MESA_SHADER_KERNEL:
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return CP_LOAD_STATE6_FRAG;
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default:
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unreachable("bad shader type");
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}
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}
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static inline enum a6xx_state_block
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fd6_stage2shadersb(gl_shader_stage type)
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{
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@ -87,7 +87,6 @@ fd6_emit_shader(struct fd_ringbuffer *ring, const struct ir3_shader_variant *so)
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enum a6xx_state_block sb = fd6_stage2shadersb(so->type);
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enum a6xx_state_src src;
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uint32_t i, sz, *bin;
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unsigned opcode;
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if (fd_mesa_debug & FD_DBG_DIRECT) {
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sz = si->sizedwords;
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@ -99,20 +98,7 @@ fd6_emit_shader(struct fd_ringbuffer *ring, const struct ir3_shader_variant *so)
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bin = NULL;
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}
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switch (so->type) {
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case MESA_SHADER_VERTEX:
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opcode = CP_LOAD_STATE6_GEOM;
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break;
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case MESA_SHADER_FRAGMENT:
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case MESA_SHADER_COMPUTE:
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case MESA_SHADER_KERNEL:
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opcode = CP_LOAD_STATE6_FRAG;
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break;
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default:
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unreachable("bad shader type");
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}
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OUT_PKT7(ring, opcode, 3 + sz);
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OUT_PKT7(ring, fd6_stage2opcode(so->type), 3 + sz);
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OUT_RING(ring, CP_LOAD_STATE6_0_DST_OFF(0) |
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CP_LOAD_STATE6_0_STATE_TYPE(ST6_SHADER) |
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CP_LOAD_STATE6_0_STATE_SRC(src) |
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