diff --git a/src/freedreno/ci/freedreno-a618-fails.txt b/src/freedreno/ci/freedreno-a618-fails.txt
index ce40d6354f0..b1994996f8b 100644
--- a/src/freedreno/ci/freedreno-a618-fails.txt
+++ b/src/freedreno/ci/freedreno-a618-fails.txt
@@ -2,10 +2,6 @@ KHR-GL46.shader_image_load_store.basic-allFormats-store,Fail
 KHR-GL46.shader_image_load_store.basic-allTargets-store,Fail
 KHR-GL46.shading_language_420pack.binding_images,Fail
 
-# https://gitlab.freedesktop.org/mesa/mesa/-/issues/5582
-KHR-GLES31.core.texture_cube_map_array.color_depth_attachments,Fail
-KHR-GL46.texture_cube_map_array.color_depth_attachments,Fail
-
 #
 # new fails with gl45:
 #
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc
index 35fc84c199c..da1e28580fb 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_blitter.cc
@@ -808,7 +808,7 @@ clear_lrz_setup(fd_cs &cs, struct fd_resource *zsbuf, struct fd_bo *lrz, double
    ncrb.add(GRAS_A2D_DEST_TL(CHIP, .x = 0, .y = 0));
    ncrb.add(GRAS_A2D_DEST_BR(CHIP,
       .x = zsbuf->lrz_layout.lrz_pitch - 1,
-      .y = zsbuf->lrz_layout.lrz_height - 1,
+      .y = zsbuf->lrz_layout.lrz_height * zsbuf->b.b.array_size - 1,
    ));
 
    union pipe_color_union clear_color = { .f = {depth} };
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc
index 0700dfd84e0..216bd011202 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.cc
@@ -237,10 +237,11 @@ emit_lrz(fd_cs &cs, struct fd_batch *batch, struct fd_batch_subpass *subpass)
    struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 
    if (!subpass->lrz) {
-      fd_crb crb(cs, 7);
+      fd_crb crb(cs, 8);
 
       crb.add(GRAS_LRZ_BUFFER_BASE(CHIP));
       crb.add(GRAS_LRZ_BUFFER_PITCH(CHIP));
+      crb.add(A6XX_GRAS_LRZ_VIEW_INFO());
       crb.add(A6XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE());
 
       if (CHIP >= A7XX) {
@@ -259,7 +260,7 @@ emit_lrz(fd_cs &cs, struct fd_batch *batch, struct fd_batch_subpass *subpass)
     */
    fd6_event_write<CHIP>(batch->ctx, cs, FD_LRZ_FLUSH);
 
-   fd_crb crb(cs, 7);
+   fd_crb crb(cs, 8);
 
    struct fd_resource *zsbuf = fd_resource(pfb->zsbuf.texture);
 
@@ -268,6 +269,12 @@ emit_lrz(fd_cs &cs, struct fd_batch *batch, struct fd_batch_subpass *subpass)
    crb.add(GRAS_LRZ_BUFFER_BASE(CHIP, .bo = subpass->lrz));
    crb.add(GRAS_LRZ_BUFFER_PITCH(CHIP,
       .pitch = zsbuf->lrz_layout.lrz_pitch * sizeof(uint16_t),
+      .array_pitch = zsbuf->lrz_layout.lrz_layer_size,
+   ));
+   crb.add(A6XX_GRAS_LRZ_VIEW_INFO(
+      .base_layer = pfb->zsbuf.first_layer,
+      .layer_count = pfb->zsbuf.last_layer - pfb->zsbuf.first_layer + 1,
+      .base_mip_level = pfb->zsbuf.level,
    ));
    crb.add(A6XX_GRAS_LRZ_FAST_CLEAR_BUFFER_BASE(
       .bo = zsbuf->lrz_layout.lrz_fc_size ? subpass->lrz : NULL,
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_resource.cc b/src/gallium/drivers/freedreno/a6xx/fd6_resource.cc
index 579bfe51203..bdc0d761ceb 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_resource.cc
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_resource.cc
@@ -234,10 +234,15 @@ static void
 setup_lrz(struct fd_resource *rsc)
 {
    struct fd_screen *screen = fd_screen(rsc->b.b.screen);
-   uint32_t nr_layers = 1;
+   uint32_t nr_layers = rsc->b.b.array_size;
+   assert(nr_layers);
+
    fdl6_lrz_layout_init<CHIP>(&rsc->lrz_layout, &rsc->layout, 0, 0,
                               screen->info, 0, nr_layers);
 
+   if (!rsc->lrz_layout.lrz_total_size)
+      return;
+
    rsc->lrz = fd_bo_new(screen->dev, rsc->lrz_layout.lrz_total_size,
                         FD_BO_NOMAP, "lrz");
 }