From 0e755f99641da55baf52419a46f241f54ccc671a Mon Sep 17 00:00:00 2001 From: Faith Ekstrand Date: Mon, 30 Jan 2023 20:53:17 -0600 Subject: [PATCH] nak: Implement bcsel Part-of: --- src/nouveau/compiler/nak_encode_tu102.rs | 9 +++++++++ src/nouveau/compiler/nak_from_nir.rs | 4 ++++ src/nouveau/compiler/nak_ir.rs | 7 +++++++ 3 files changed, 20 insertions(+) diff --git a/src/nouveau/compiler/nak_encode_tu102.rs b/src/nouveau/compiler/nak_encode_tu102.rs index 55b29a77d6f..fd3d179447a 100644 --- a/src/nouveau/compiler/nak_encode_tu102.rs +++ b/src/nouveau/compiler/nak_encode_tu102.rs @@ -216,6 +216,14 @@ fn encode_mov(bs: &mut impl BitSetMut, instr: &Instr) { bs.set_field(72..76, 0xf_u32 /* TODO: Quad lanes */); } +fn encode_sel(bs: &mut impl BitSetMut, instr: &Instr) { + let i = Instr::new(Opcode::SEL, instr.dsts(), &instr.srcs()[1..]); + encode_alu(bs, &i, 0x007); + + encode_pred(bs, 87..90, *instr.src(0).as_reg().unwrap()); + bs.set_bit(90, false); /* not */ +} + fn encode_iadd3(bs: &mut impl BitSetMut, instr: &Instr) { encode_alu(bs, instr, 0x010); @@ -377,6 +385,7 @@ pub fn encode_instr(instr: &Instr) -> [u32; 4] { match &instr.op { Opcode::S2R(i) => encode_s2r(&mut bs, instr, *i), Opcode::MOV => encode_mov(&mut bs, instr), + Opcode::SEL => encode_sel(&mut bs, instr), Opcode::IADD3 => encode_iadd3(&mut bs, instr), Opcode::LOP3(op) => encode_lop3(&mut bs, instr, &op), Opcode::ISETP(op) => encode_isetp(&mut bs, instr, &op), diff --git a/src/nouveau/compiler/nak_from_nir.rs b/src/nouveau/compiler/nak_from_nir.rs index 12a413b9c3f..562ca7d1701 100644 --- a/src/nouveau/compiler/nak_from_nir.rs +++ b/src/nouveau/compiler/nak_from_nir.rs @@ -86,6 +86,10 @@ impl<'a> ShaderFromNir<'a> { let dst = self.get_dst(&alu.def); match alu.op { + nir_op_bcsel => { + self.instrs + .push(Instr::new_sel(dst, srcs[0], srcs[1], srcs[2])); + } nir_op_fadd => { self.instrs.push(Instr::new_fadd(dst, srcs[0], srcs[1])); } diff --git a/src/nouveau/compiler/nak_ir.rs b/src/nouveau/compiler/nak_ir.rs index 09979c4b969..27fe161fe58 100644 --- a/src/nouveau/compiler/nak_ir.rs +++ b/src/nouveau/compiler/nak_ir.rs @@ -832,6 +832,10 @@ impl Instr { Instr::new(Opcode::MOV, slice::from_ref(&dst), &[Src::Zero, src]) } + pub fn new_sel(dst: Dst, sel: Src, x: Src, y: Src) -> Instr { + Instr::new(Opcode::SEL, slice::from_ref(&dst), &[sel, x, y]) + } + pub fn new_vec(dst: Dst, srcs: &[Src]) -> Instr { Instr::new(Opcode::VEC, slice::from_ref(&dst), srcs) } @@ -946,6 +950,7 @@ impl Instr { | Opcode::ISETP(_) | Opcode::SHL => Some(6), Opcode::MOV => Some(15), + Opcode::SEL => Some(15), Opcode::S2R(_) => None, Opcode::ALD(_) => None, Opcode::AST(_) => Some(15), @@ -996,6 +1001,7 @@ pub enum Opcode { S2R(u8), MOV, + SEL, VEC, SPLIT, @@ -1024,6 +1030,7 @@ impl fmt::Display for Opcode { Opcode::SHL => write!(f, "SHL"), Opcode::S2R(i) => write!(f, "S2R({})", i), Opcode::MOV => write!(f, "MOV"), + Opcode::SEL => write!(f, "SEL"), Opcode::VEC => write!(f, "VEC"), Opcode::SPLIT => write!(f, "SPLIT"), Opcode::ALD(_) => write!(f, "ALD"),