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ac/surface: add NBC view support on GFX12

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Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29676>
This commit is contained in:
Samuel Pitoiset 2024-06-03 12:00:35 +02:00 • committed by Marge Bot
parent ef6deb35ef
commit 0e62c728eb
1 changed files with 59 additions and 4 deletions
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63
src/amd/common/ac_surface.c
View file

@ -4028,14 +4028,54 @@ ac_surface_addr_from_coord(struct ac_addrlib *addrlib, const struct radeon_info
return output.addr;
}
void
ac_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info *info,
static void
gfx12_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info *info,
const struct radeon_surf *surf, const struct ac_surf_info *surf_info,
unsigned level, unsigned layer, struct ac_surf_nbc_view *out)
{
/* Only implemented for GFX10+ */
assert(info->gfx_level >= GFX10);
ADDR3_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT input = {0};
input.size = sizeof(ADDR3_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT);
input.swizzleMode = surf->u.gfx9.swizzle_mode;
input.resourceType = (AddrResourceType)surf->u.gfx9.resource_type;
switch (surf->bpe) {
case 8:
input.format = ADDR_FMT_BC1;
break;
case 16:
input.format = ADDR_FMT_BC3;
break;
default:
assert(0);
}
input.unAlignedDims.width = surf_info->width;
input.unAlignedDims.height = surf_info->height;
input.numMipLevels = surf_info->levels;
input.pipeBankXor = surf->tile_swizzle;
input.slice = layer;
input.mipId = level;
ADDR_E_RETURNCODE res;
ADDR3_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT output = {0};
output.size = sizeof(ADDR3_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT);
res = Addr3ComputeNonBlockCompressedView(addrlib->handle, &input, &output);
if (res == ADDR_OK) {
out->base_address_offset = output.offset;
out->tile_swizzle = output.pipeBankXor;
out->width = output.unAlignedDims.width;
out->height = output.unAlignedDims.height;
out->num_levels = output.numMipLevels;
out->level = output.mipId;
out->valid = true;
} else {
out->valid = false;
}
}
static void
gfx10_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info *info,
const struct radeon_surf *surf, const struct ac_surf_info *surf_info,
unsigned level, unsigned layer, struct ac_surf_nbc_view *out)
{
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT input = {0};
input.size = sizeof(ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT);
input.swizzleMode = surf->u.gfx9.swizzle_mode;
@ -4075,6 +4115,21 @@ ac_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info
}
}
void
ac_surface_compute_nbc_view(struct ac_addrlib *addrlib, const struct radeon_info *info,
const struct radeon_surf *surf, const struct ac_surf_info *surf_info,
unsigned level, unsigned layer, struct ac_surf_nbc_view *out)
{
/* Only implemented for GFX10+ */
assert(info->gfx_level >= GFX10);
if (info->gfx_level >= GFX12) {
gfx12_surface_compute_nbc_view(addrlib, info, surf, surf_info, level, layer, out);
} else {
gfx10_surface_compute_nbc_view(addrlib, info, surf, surf_info, level, layer, out);
}
}
void ac_surface_print_info(FILE *out, const struct radeon_info *info,
const struct radeon_surf *surf)
{