From 0e2e4688af737328229101e4983d5d7120ac6e5f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pavel=20Ondra=C4=8Dka?= Date: Thu, 21 Dec 2023 11:43:50 +0100 Subject: [PATCH] r300: fix writemask for nir_intrinsic_load_ubo_vec4 load_ubo_vec4 has always 4 components, however when translating to TGSI just set the writemask according to the channels that are actually used later. This is now done by deadcode analysis, but that one is going away soon. Reviewed-by: Filip Gawin Part-of: --- src/gallium/drivers/r300/compiler/nir_to_rc.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/src/gallium/drivers/r300/compiler/nir_to_rc.c b/src/gallium/drivers/r300/compiler/nir_to_rc.c index 81290e57838..97a712036e1 100644 --- a/src/gallium/drivers/r300/compiler/nir_to_rc.c +++ b/src/gallium/drivers/r300/compiler/nir_to_rc.c @@ -1048,7 +1048,13 @@ ntr_swizzle_for_write_mask(struct ureg_src src, uint32_t write_mask) static struct ureg_dst ntr_get_ssa_def_decl(struct ntr_compile *c, nir_def *ssa) { - uint32_t writemask = BITSET_MASK(ssa->num_components); + uint32_t writemask; + /* Fix writemask for nir_intrinsic_load_ubo_vec4 accoring to uses. */ + if (ssa->parent_instr->type == nir_instr_type_intrinsic && + nir_instr_as_intrinsic(ssa->parent_instr)->intrinsic == nir_intrinsic_load_ubo_vec4) + writemask = nir_def_components_read(ssa); + else + writemask = BITSET_MASK(ssa->num_components); struct ureg_dst dst; if (!ntr_try_store_ssa_in_tgsi_output(c, &dst, ssa))