From 0e1b7aa8cbc1c19d6f0f8dbb8b388b8d22c76d2a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 25 Aug 2024 15:46:36 -0400 Subject: [PATCH] radeonsi: deduplicate how GLM flush flags are set for gfx10-11 Reviewed-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/si_barrier.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_barrier.c b/src/gallium/drivers/radeonsi/si_barrier.c index cfd7c3826db..2a57a1f3375 100644 --- a/src/gallium/drivers/radeonsi/si_barrier.c +++ b/src/gallium/drivers/radeonsi/si_barrier.c @@ -84,6 +84,7 @@ static void gfx10_emit_barrier(struct si_context *ctx, struct radeon_cmdbuf *cs) /* We don't need these. */ assert(!(flags & SI_BARRIER_EVENT_FLUSH_AND_INV_DB_META)); + assert(ctx->gfx_level < GFX12 || !(flags & SI_BARRIER_INV_L2_METADATA)); radeon_begin(cs); @@ -109,17 +110,17 @@ static void gfx10_emit_barrier(struct si_context *ctx, struct radeon_cmdbuf *cs) */ if (flags & SI_BARRIER_INV_L2) { /* Writeback and invalidate everything in L2. */ - gcr_cntl |= S_586_GL2_INV(1) | S_586_GL2_WB(1) | - (ctx->gfx_level < GFX12 ? S_586_GLM_INV(1) | S_586_GLM_WB(1) : 0); + gcr_cntl |= S_586_GL2_INV(1) | S_586_GL2_WB(1); ctx->num_L2_invalidates++; } else if (flags & SI_BARRIER_WB_L2) { - gcr_cntl |= S_586_GL2_WB(1) | - (ctx->gfx_level < GFX12 ? S_586_GLM_WB(1) | S_586_GLM_INV(1) : 0); - } else if (flags & SI_BARRIER_INV_L2_METADATA) { - assert(ctx->gfx_level < GFX12); - gcr_cntl |= S_586_GLM_INV(1) | S_586_GLM_WB(1); + gcr_cntl |= S_586_GL2_WB(1); } + /* Invalidate the metadata cache. */ + if (ctx->gfx_level < GFX12 && + flags & (SI_BARRIER_INV_L2 | SI_BARRIER_WB_L2 | SI_BARRIER_INV_L2_METADATA)) + gcr_cntl |= S_586_GLM_INV(1) | S_586_GLM_WB(1); + if (flags & (SI_BARRIER_SYNC_AND_INV_CB | SI_BARRIER_SYNC_AND_INV_DB)) { if ((flags & SI_BARRIER_SYNC_AND_INV_CB && flags & SI_BARRIER_SYNC_AND_INV_DB) || /* Gfx11 can't use the DB_META event and must use a full flush to flush DB_META. */