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r600g: split instruction into scalar
Split instruction into scalar in core compiler this simplify the way we translate the instruction in latter stage. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
This commit is contained in:
Jerome Glisse
parent
7643f45b10
commit
0db388eedd
4 changed files with 143 additions and 148 deletions
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@ -71,7 +71,7 @@ struct c_vector {
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#define C_SWIZZLE_W 3
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#define C_SWIZZLE_0 4
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#define C_SWIZZLE_1 5
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#define C_SWIZZLE_D 6 /**< discard */
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#define C_SWIZZLE_D 6
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#define C_FILE_NULL 0
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#define C_FILE_CONSTANT 1
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@ -247,18 +247,21 @@ struct c_vector {
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struct c_operand {
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struct c_vector *vector;
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unsigned swizzle[4];
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unsigned flag[4];
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unsigned swizzle;
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unsigned flag;
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};
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struct c_op {
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unsigned ninput;
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struct c_operand input[3];
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struct c_operand output;
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unsigned opcode;
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};
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struct c_instruction {
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struct c_instruction *next, *prev;
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unsigned opcode;
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unsigned ninput;
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struct c_operand input[3];
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struct c_operand output;
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unsigned write_mask;
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void *backend;
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unsigned nop;
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struct c_op op[5];
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};
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struct c_node;
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@ -229,28 +229,25 @@ static void pindent(unsigned indent)
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static void c_node_dump(struct c_node *node, unsigned indent)
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{
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struct c_instruction *i;
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unsigned j;
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unsigned j, k;
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pindent(indent); fprintf(stderr, "# node %s\n", c_get_name(c_opcode_str, node->opcode));
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c_list_for_each(i, &node->insts) {
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pindent(indent); fprintf(stderr, "%s", c_get_name(c_opcode_str, i->opcode));
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fprintf(stderr, " %s[%d][%s%s%s%s]",
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c_get_name(c_file_str, i->output.vector->file),
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i->output.vector->id,
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c_get_name(c_file_swz, i->output.swizzle[0]),
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c_get_name(c_file_swz, i->output.swizzle[1]),
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c_get_name(c_file_swz, i->output.swizzle[2]),
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c_get_name(c_file_swz, i->output.swizzle[3]));
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for (j = 0; j < i->ninput; j++) {
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fprintf(stderr, " %s[%d][%s%s%s%s]",
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c_get_name(c_file_str, i->input[j].vector->file),
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i->input[j].vector->id,
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c_get_name(c_file_swz, i->input[j].swizzle[0]),
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c_get_name(c_file_swz, i->input[j].swizzle[1]),
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c_get_name(c_file_swz, i->input[j].swizzle[2]),
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c_get_name(c_file_swz, i->input[j].swizzle[3]));
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for (k = 0; k < i->nop; k++) {
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pindent(indent);
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fprintf(stderr, "%s", c_get_name(c_opcode_str, i->op[k].opcode));
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fprintf(stderr, " %s[%d][%s]",
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c_get_name(c_file_str, i->op[k].output.vector->file),
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i->op[k].output.vector->id,
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c_get_name(c_file_swz, i->op[k].output.swizzle));
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for (j = 0; j < i->op[k].ninput; j++) {
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fprintf(stderr, " %s[%d][%s]",
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c_get_name(c_file_str, i->op[k].input[j].vector->file),
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i->op[k].input[j].vector->id,
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c_get_name(c_file_swz, i->op[k].input[j].swizzle));
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}
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fprintf(stderr, ";\n");
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}
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fprintf(stderr, ";\n");
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}
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}
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@ -60,16 +60,31 @@ int r600_shader_insert_fetch(struct c_shader *shader)
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if (vr == NULL)
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return -ENOMEM;
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memset(&instruction, 0, sizeof(struct c_instruction));
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instruction.opcode = C_OPCODE_VFETCH;
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instruction.write_mask = 0xF;
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instruction.ninput = 2;
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instruction.output.vector = v;
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instruction.input[0].vector = vi;
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instruction.input[1].vector = vr;
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instruction.output.swizzle[0] = C_SWIZZLE_X;
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instruction.output.swizzle[1] = C_SWIZZLE_Y;
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instruction.output.swizzle[2] = C_SWIZZLE_Z;
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instruction.output.swizzle[3] = C_SWIZZLE_W;
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instruction.nop = 4;
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instruction.op[0].opcode = C_OPCODE_VFETCH;
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instruction.op[1].opcode = C_OPCODE_VFETCH;
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instruction.op[2].opcode = C_OPCODE_VFETCH;
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instruction.op[3].opcode = C_OPCODE_VFETCH;
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instruction.op[0].ninput = 2;
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instruction.op[1].ninput = 2;
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instruction.op[2].ninput = 2;
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instruction.op[3].ninput = 2;
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instruction.op[0].output.vector = v;
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instruction.op[1].output.vector = v;
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instruction.op[2].output.vector = v;
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instruction.op[3].output.vector = v;
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instruction.op[0].input[0].vector = vi;
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instruction.op[0].input[1].vector = vr;
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instruction.op[1].input[0].vector = vi;
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instruction.op[1].input[1].vector = vr;
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instruction.op[2].input[0].vector = vi;
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instruction.op[2].input[1].vector = vr;
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instruction.op[3].input[0].vector = vi;
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instruction.op[3].input[1].vector = vr;
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instruction.op[0].output.swizzle = C_SWIZZLE_X;
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instruction.op[1].output.swizzle = C_SWIZZLE_Y;
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instruction.op[2].output.swizzle = C_SWIZZLE_Z;
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instruction.op[3].output.swizzle = C_SWIZZLE_W;
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r = c_node_add_new_instruction_head(&shader->entry, &instruction);
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if (r)
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return r;
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@ -316,7 +331,7 @@ static int r600_shader_add_vfetch(struct r600_shader *rshader,
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if (instruction == NULL)
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return 0;
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if (instruction->opcode != C_OPCODE_VFETCH)
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if (instruction->op[0].opcode != C_OPCODE_VFETCH)
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return 0;
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if (!c_list_empty(&node->alu)) {
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rnode = r600_shader_new_node(rshader, node->node);
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@ -327,13 +342,13 @@ static int r600_shader_add_vfetch(struct r600_shader *rshader,
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vfetch = calloc(1, sizeof(struct r600_shader_vfetch));
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if (vfetch == NULL)
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return -ENOMEM;
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r = r600_shader_find_gpr(rshader, instruction->output.vector, 0, &vfetch->dst[0]);
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r = r600_shader_find_gpr(rshader, instruction->op[0].output.vector, 0, &vfetch->dst[0]);
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if (r)
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return r;
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r = r600_shader_find_gpr(rshader, instruction->input[0].vector, 0, &vfetch->src[0]);
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r = r600_shader_find_gpr(rshader, instruction->op[0].input[0].vector, 0, &vfetch->src[0]);
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if (r)
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return r;
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r = r600_shader_find_gpr(rshader, instruction->input[1].vector, 0, &vfetch->src[1]);
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r = r600_shader_find_gpr(rshader, instruction->op[0].input[1].vector, 0, &vfetch->src[1]);
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if (r)
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return r;
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vfetch->dst[0].chan = C_SWIZZLE_X;
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@ -355,7 +370,7 @@ static int r600_node_translate(struct r600_shader *rshader, struct c_node *node)
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if (rnode == NULL)
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return -ENOMEM;
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c_list_for_each(instruction, &node->insts) {
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switch (instruction->opcode) {
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switch (instruction->op[0].opcode) {
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case C_OPCODE_VFETCH:
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r = r600_shader_add_vfetch(rshader, rnode, instruction);
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if (r) {
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@ -414,79 +429,13 @@ static struct r600_shader_alu *r600_shader_insert_alu(struct r600_shader *rshade
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return alu;
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}
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static int r600_shader_node_add_alu(struct r600_shader *rshader,
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struct r600_shader_node *node,
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struct r600_shader_alu *alu,
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unsigned instruction,
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unsigned ninput,
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struct r600_shader_operand *dst,
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struct r600_shader_operand src[3])
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{
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struct r600_shader_alu *nalu;
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unsigned nconstant = 0, nliteral = 0, slot, i;
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/* count number of constant & literal */
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for (i = 0; i < ninput; i++) {
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if (src[i].vector->file == C_FILE_IMMEDIATE) {
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nliteral++;
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nconstant++;
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}
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}
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slot = dst->chan;
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if (r600_instruction_info[instruction].is_trans) {
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slot = 4;
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}
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/* allocate new alu group if necessary */
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nalu = alu;
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if (alu == NULL) {
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nalu = r600_shader_insert_alu(rshader, node);
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if (nalu == NULL)
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return -ENOMEM;
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alu = nalu;
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}
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if ((alu->alu[slot].inst != INST_NOP &&
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alu->alu[4].inst != INST_NOP) ||
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(alu->nconstant + nconstant) > 4 ||
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(alu->nliteral + nliteral) > 4) {
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/* neither trans neither dst slot are free need new alu */
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nalu = r600_shader_insert_alu(rshader, node);
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if (nalu == NULL)
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return -ENOMEM;
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alu = nalu;
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}
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if (alu->alu[slot].inst != INST_NOP) {
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slot = 4;
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}
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alu->alu[slot].dst = *dst;
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alu->alu[slot].inst = instruction;
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alu->alu[slot].opcode = r600_instruction_info[instruction].opcode;
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alu->alu[slot].is_op3 = r600_instruction_info[instruction].is_op3;
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for (i = 0; i < ninput; i++) {
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alu->alu[slot].src[i] = src[i];
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if (src[i].vector->file == C_FILE_IMMEDIATE) {
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alu->literal[alu->nliteral++] = src[i].vector->channel[0]->value;
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alu->literal[alu->nliteral++] = src[i].vector->channel[1]->value;
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alu->literal[alu->nliteral++] = src[i].vector->channel[2]->value;
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alu->literal[alu->nliteral++] = src[i].vector->channel[3]->value;
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}
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}
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return 0;
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}
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static int r600_shader_alu_translate(struct r600_shader *rshader,
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struct r600_shader_node *node,
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struct c_instruction *instruction)
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{
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struct r600_alu_instruction *ainfo = &r600_alu_instruction[instruction->opcode];
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struct r600_instruction_info *info;
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struct r600_shader_alu *alu;
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struct r600_shader_node *rnode;
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int r, i, j;
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struct r600_shader_operand dst;
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struct r600_shader_operand src[3];
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struct r600_shader_alu *alu;
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int i, j, r, comp;
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if (!c_list_empty(&node->vfetch)) {
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rnode = r600_shader_new_node(rshader, node->node);
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@ -496,40 +445,57 @@ static int r600_shader_alu_translate(struct r600_shader *rshader,
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}
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node = rnode;
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}
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/* initialize alu */
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alu = r600_shader_insert_alu(rshader, node);
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if (alu == NULL) {
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fprintf(stderr, "%s %d instert alu node failed\n", __func__, __LINE__);
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return -ENOMEM;
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}
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for (i = 0; i < 4; i++) {
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if (!(instruction->write_mask) || instruction->output.swizzle[i] == C_SWIZZLE_D)
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continue;
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if (ainfo->instruction == INST_NOP) {
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fprintf(stderr, "%s:%d unsupported instruction %d\n", __FILE__, __LINE__, instruction->opcode);
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continue;
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/* check special operation like lit */
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/* go through operation */
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for (i = 0; i < instruction->nop; i++) {
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struct r600_alu_instruction *ainfo = &r600_alu_instruction[instruction->op[i].opcode];
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struct r600_instruction_info *iinfo = &r600_instruction_info[ainfo->instruction];
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unsigned comp;
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/* check that output is a valid component */
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comp = instruction->op[i].output.swizzle;
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switch (comp) {
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case C_SWIZZLE_X:
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case C_SWIZZLE_Y:
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case C_SWIZZLE_Z:
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case C_SWIZZLE_W:
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break;
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case C_SWIZZLE_0:
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case C_SWIZZLE_1:
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default:
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fprintf(stderr, "%s %d invalid output\n", __func__, __LINE__);
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return -EINVAL;
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}
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info = &r600_instruction_info[ainfo->instruction];
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r = r600_shader_find_gpr(rshader, instruction->output.vector,
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instruction->output.swizzle[i], &dst);
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if (r) {
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fprintf(stderr, "%s %d register failed\n", __FILE__, __LINE__);
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return r;
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}
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for (j = 0; j < instruction->ninput; j++) {
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r = r600_shader_find_gpr(rshader, instruction->input[j].vector,
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instruction->input[j].swizzle[i], &src[j]);
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alu->alu[comp].inst = ainfo->instruction;
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alu->alu[comp].opcode = iinfo->opcode;
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alu->alu[comp].is_op3 = iinfo->is_op3;
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for (j = 0; j < instruction->op[i].ninput; j++) {
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r = r600_shader_find_gpr(rshader, instruction->op[i].input[j].vector,
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instruction->op[i].input[j].swizzle, &alu->alu[comp].src[j]);
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if (r) {
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fprintf(stderr, "%s %d register failed\n", __FILE__, __LINE__);
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return r;
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}
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}
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r = r600_shader_node_add_alu(rshader, node, alu, ainfo->instruction,
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instruction->ninput, &dst, src);
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r = r600_shader_find_gpr(rshader, instruction->op[i].output.vector,
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instruction->op[i].output.swizzle, &alu->alu[comp].dst);
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if (r) {
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fprintf(stderr, "%s %d failed\n", __FILE__, __LINE__);
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fprintf(stderr, "%s %d register failed\n", __FILE__, __LINE__);
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return r;
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}
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}
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for (i = instruction->nop; i >= 0; i--) {
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if (alu->alu[i].inst != INST_NOP) {
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alu->alu[i].last = 1;
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alu->nalu = i + 1;
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break;
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}
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}
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return 0;
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}
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@ -576,12 +542,14 @@ int r600_shader_legalize(struct r600_shader *rshader)
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struct r600_shader_node *node, *nnode;
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struct r600_shader_alu *alu, *nalu;
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#if 0
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c_list_for_each_safe(node, nnode, &rshader->nodes) {
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c_list_for_each_safe(alu, nalu, &node->alu) {
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alu->nalu = 5;
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alu->alu[4].last = 1;
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}
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}
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#endif
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return 0;
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}
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@ -146,7 +146,7 @@ static int ntransform_instruction(struct tgsi_shader *ts)
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struct c_shader *shader = ts->shader;
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struct c_instruction instruction;
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unsigned opcode;
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int i, r;
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int i, j, r;
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if (fi->Instruction.NumDstRegs > 1) {
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fprintf(stderr, "%s %d unsupported\n", __func__, __LINE__);
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@ -192,21 +192,48 @@ static int ntransform_instruction(struct tgsi_shader *ts)
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}
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/* FIXME add flow instruction handling */
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memset(&instruction, 0, sizeof(struct c_instruction));
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instruction.opcode = opcode;
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instruction.ninput = fi->Instruction.NumSrcRegs;
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instruction.write_mask = fi->Dst[0].Register.WriteMask;
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for (i = 0; i < fi->Instruction.NumSrcRegs; i++) {
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instruction.input[i].vector = ts->v[fi->Src[i].Register.File][fi->Src[i].Register.Index];
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instruction.input[i].swizzle[0] = fi->Src[i].Register.SwizzleX;
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instruction.input[i].swizzle[1] = fi->Src[i].Register.SwizzleY;
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instruction.input[i].swizzle[2] = fi->Src[i].Register.SwizzleZ;
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instruction.input[i].swizzle[3] = fi->Src[i].Register.SwizzleW;
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instruction.nop = 0;
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for (j = 0; j < 4; j++) {
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instruction.op[instruction.nop].opcode = opcode;
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instruction.op[instruction.nop].ninput = fi->Instruction.NumSrcRegs;
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for (i = 0; i < fi->Instruction.NumSrcRegs; i++) {
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instruction.op[instruction.nop].input[i].vector = ts->v[fi->Src[i].Register.File][fi->Src[i].Register.Index];
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switch (j) {
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case 0:
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instruction.op[instruction.nop].input[i].swizzle = fi->Src[i].Register.SwizzleX;
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break;
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case 1:
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instruction.op[instruction.nop].input[i].swizzle = fi->Src[i].Register.SwizzleY;
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break;
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case 2:
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instruction.op[instruction.nop].input[i].swizzle = fi->Src[i].Register.SwizzleZ;
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break;
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case 3:
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instruction.op[instruction.nop].input[i].swizzle = fi->Src[i].Register.SwizzleW;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
}
|
||||
instruction.op[instruction.nop].output.vector = ts->v[fi->Dst[0].Register.File][fi->Dst[0].Register.Index];
|
||||
switch (j) {
|
||||
case 0:
|
||||
instruction.op[instruction.nop].output.swizzle = (fi->Dst[0].Register.WriteMask & 0x1) ? C_SWIZZLE_X : C_SWIZZLE_D;
|
||||
break;
|
||||
case 1:
|
||||
instruction.op[instruction.nop].output.swizzle = (fi->Dst[0].Register.WriteMask & 0x1) ? C_SWIZZLE_Y : C_SWIZZLE_D;
|
||||
break;
|
||||
case 2:
|
||||
instruction.op[instruction.nop].output.swizzle = (fi->Dst[0].Register.WriteMask & 0x1) ? C_SWIZZLE_Z : C_SWIZZLE_D;
|
||||
break;
|
||||
case 3:
|
||||
instruction.op[instruction.nop].output.swizzle = (fi->Dst[0].Register.WriteMask & 0x1) ? C_SWIZZLE_W : C_SWIZZLE_D;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
instruction.nop++;
|
||||
}
|
||||
instruction.output.vector = ts->v[fi->Dst[0].Register.File][fi->Dst[0].Register.Index];
|
||||
instruction.output.swizzle[0] = (fi->Dst[0].Register.WriteMask & 0x1) ? C_SWIZZLE_X : C_SWIZZLE_D;
|
||||
instruction.output.swizzle[1] = (fi->Dst[0].Register.WriteMask & 0x2) ? C_SWIZZLE_Y : C_SWIZZLE_D;
|
||||
instruction.output.swizzle[2] = (fi->Dst[0].Register.WriteMask & 0x4) ? C_SWIZZLE_Z : C_SWIZZLE_D;
|
||||
instruction.output.swizzle[3] = (fi->Dst[0].Register.WriteMask & 0x8) ? C_SWIZZLE_W : C_SWIZZLE_D;
|
||||
return c_node_add_new_instruction(ts->node, &instruction);
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue