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isl: Allow CCS for 8bpp surfaces with 3+ miplevels

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I can't find a restriction for enabling CCS on these surfaces in recent
versions of the Bspec. Since I didn't cite my source, I'm not even sure
such a restriction existed in the first place.

Reviewed-by: Sagar Ghuge <sagar.ghuge@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/7085>
This commit is contained in:
Nanley Chery 2020-10-09 11:25:53 -07:00 • committed by Marge Bot
parent f94ba6b6f5
commit 0d9216a7cb
1 changed files with 0 additions and 11 deletions
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11
src/intel/isl/isl.c
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@ -1972,17 +1972,6 @@ isl_surf_supports_ccs(const struct isl_device *dev,
if (isl_surf_usage_is_stencil(surf->usage) && surf->samples > 1)
return false;
/* On Gen12, 8BPP surfaces cannot be compressed if any level is not
* 32Bx4row-aligned. For now, just reject the cases where alignment
* matters.
*/
if (isl_format_get_layout(surf->format)->bpb == 8 && surf->levels >= 3) {
isl_finishme("%s:%s: CCS for 8BPP textures with 3+ miplevels is "
"disabled, but support for more levels is possible.",
__FILE__, __func__);
return false;
}
/* On Gen12, all CCS-compressed surface pitches must be multiples of
* 512B.
*/