From 0d52c7941e2969bb8761720c5c35c1ef10d311f5 Mon Sep 17 00:00:00 2001 From: Ian Romanick Date: Thu, 26 Feb 2026 13:14:54 -0800 Subject: [PATCH] brw: Also check for ADDRESS file in update_for_reads Like accumulators and ARF address registers, the virtual address registers are not tracked in a way the defs analysis can know about. This could actually be fixed, but that is future work. Fixes: b110b06447b ("brw: introduce a new register type for the address register") Suggested-by: Lionel Reviewed-by: Kenneth Graunke (cherry picked from commit 8624da56ee8a66b2767f7195422dca9a75a9c12d) Part-of: --- .pick_status.json | 2 +- src/intel/compiler/brw/brw_analysis_def.cpp | 9 ++++---- src/intel/compiler/brw/test_def_analysis.cpp | 24 ++++++++++++++++++++ 3 files changed, 30 insertions(+), 5 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index 11a3f7105a6..750f9ff1a58 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -2944,7 +2944,7 @@ "description": "brw: Also check for ADDRESS file in update_for_reads", "nominated": true, "nomination_type": 2, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "b110b06447b421c4ee5b0d55c37e6a1cc1b62cd5", "notes": null diff --git a/src/intel/compiler/brw/brw_analysis_def.cpp b/src/intel/compiler/brw/brw_analysis_def.cpp index ba7bb478f8a..8cfde33ea46 100644 --- a/src/intel/compiler/brw/brw_analysis_def.cpp +++ b/src/intel/compiler/brw/brw_analysis_def.cpp @@ -60,10 +60,11 @@ brw_def_analysis::update_for_reads(const brw_idom_tree &idom, /* Similarly, explicit reads of accumulators, address registers, * and flags make the destination not a def, as we don't track those. */ - if (inst->src[i].file == ARF && - (brw_reg_is_arf(inst->src[i], BRW_ARF_ADDRESS) || - brw_reg_is_arf(inst->src[i], BRW_ARF_ACCUMULATOR) || - brw_reg_is_arf(inst->src[i], BRW_ARF_FLAG))) + if (inst->src[i].file == ADDRESS || + (inst->src[i].file == ARF && + (brw_reg_is_arf(inst->src[i], BRW_ARF_ADDRESS) || + brw_reg_is_arf(inst->src[i], BRW_ARF_ACCUMULATOR) || + brw_reg_is_arf(inst->src[i], BRW_ARF_FLAG)))) mark_invalid(inst->dst); continue; diff --git a/src/intel/compiler/brw/test_def_analysis.cpp b/src/intel/compiler/brw/test_def_analysis.cpp index 34d6715b8da..d3ff9815be6 100644 --- a/src/intel/compiler/brw/test_def_analysis.cpp +++ b/src/intel/compiler/brw/test_def_analysis.cpp @@ -91,3 +91,27 @@ TEST_F(defs_test, src_is_acc2) EXPECT_EQ(NULL, defs.get(dst0)); } + +TEST_F(defs_test, src_is_address) +{ + set_gfx_verx10(125); + + brw_builder bld = make_shader(MESA_SHADER_FRAGMENT, 16); + + brw_reg dst0 = vgrf(bld, BRW_TYPE_UW); + brw_reg src0 = vgrf(bld, BRW_TYPE_UW); + brw_reg addr = brw_address_reg(0); + + addr.nr = 1; + + bld.MOV(src0, brw_imm_uw(1)); + bld.uniform().MOV(addr, brw_imm_uw(2)); + bld.ADD(dst0, src0, addr); + + brw_calculate_cfg(*bld.shader); + brw_validate(*bld.shader); + + const brw_def_analysis &defs = bld.shader->def_analysis.require(); + + EXPECT_EQ(NULL, defs.get(dst0)); +}