virgl: Fix injection of double from const mov instruction

We only copy two components, we have to use the complete original source,
and we should rewrite the new source from scratch to avoid incorrect
dimension and indirect handling.

Fixes: 036d7172c (virgl: Move double operands to a temp to avoid double-swizzling bugs)

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19975>
(cherry picked from commit d5217b024e)
This commit is contained in:
Gert Wollny 2022-11-24 10:14:25 +01:00 committed by Eric Engestrom
parent cd01442bab
commit 0c6af7585d
3 changed files with 4 additions and 29 deletions

View file

@ -1453,7 +1453,7 @@
"description": "virgl: Fix injection of double from const mov instruction",
"nominated": true,
"nomination_type": 1,
"resolution": 0,
"resolution": 1,
"main_sha": null,
"because_sha": "036d7172c24a18eca653fa95eb40b70719ce4d7e"
},

View file

@ -39,12 +39,8 @@ dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_x,Fa
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_dst_y,Fail
dEQP-GLES3.functional.fbo.blit.rect.nearest_consistency_min_reverse_src_x,Fail
KHR-GL43.compute_shader.fp64-case1,Fail
KHR-GL43.compute_shader.resource-subroutine,Fail
KHR-GL43.cull_distance.functional,Fail
KHR-GL43.gpu_shader_fp64.fp64.named_uniform_blocks,Fail
KHR-GL43.gpu_shader_fp64.fp64.varyings,Fail
KHR-GL43.map_buffer_alignment.functional,Crash
KHR-GL43.shader_image_load_store.basic-allFormats-loadGeometryStages,Fail
KHR-GL43.shader_image_load_store.basic-allFormats-storeGeometryStages,Fail
@ -403,24 +399,6 @@ spec@arb_gpu_shader_fp64@execution@conversion@vert-conversion-explicit-dvec2-vec
spec@arb_gpu_shader_fp64@execution@conversion@vert-conversion-explicit-dvec3-vec3,Fail
spec@arb_gpu_shader_fp64@execution@conversion@vert-conversion-explicit-dvec4-vec4,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@fs-dmat4,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@fs-dmat4-row-major,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@fs-double-array-const-index,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@fs-doubles,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@fs-doubles-float-mixed,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@fs-nested-struct,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@fs-ubo-direct-1,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@gs-dmat4,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@gs-dmat4-row-major,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@gs-double-array-const-index,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@gs-doubles-float-mixed,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@gs-nested-struct,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@vs-dmat4,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@vs-dmat4-row-major,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@vs-double-array-const-index,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@vs-doubles,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@vs-doubles-float-mixed,Fail
spec@arb_gpu_shader_fp64@uniform_buffers@vs-nested-struct,Fail
spec@arb_occlusion_query@occlusion_query_conform,Fail
spec@arb_occlusion_query@occlusion_query_conform@GetObjivAval_multi1,Fail
spec@arb_occlusion_query@occlusion_query_meta_no_fragments,Fail
@ -509,10 +487,6 @@ spec@arb_shader_texture_image_samples@texturesamples@vs-sampler2dmsarray-2,Fail
spec@arb_shader_texture_image_samples@texturesamples@vs-usampler2dms-2,Fail
spec@arb_shader_texture_image_samples@texturesamples@vs-usampler2dmsarray-2,Fail
spec@arb_shader_texture_lod@execution@arb_shader_texture_lod-texgrad,Fail
spec@arb_tessellation_shader@execution@double-array-vs-tcs-tes,Fail
spec@arb_tessellation_shader@execution@double-vs-tcs-tes,Fail
spec@arb_tessellation_shader@execution@dvec2-vs-tcs-tes,Fail
spec@arb_tessellation_shader@execution@dvec3-vs-tcs-tes,Fail
spec@arb_tessellation_shader@execution@gs-primitiveid-instanced,Fail
# " intrinsic copy_deref (ssa_2, ssa_3) (dst_access=0, src_access=0)

View file

@ -368,15 +368,16 @@ virgl_tgsi_transform_instruction(struct tgsi_transform_context *ctx,
temp_inst.Instruction.NumDstRegs = 1;
temp_inst.Dst[0].Register.File = TGSI_FILE_TEMPORARY,
temp_inst.Dst[0].Register.Index = vtctx->src_temp + i;
temp_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XYZ;
temp_inst.Dst[0].Register.WriteMask = TGSI_WRITEMASK_XY;
temp_inst.Instruction.NumSrcRegs = 1;
tgsi_transform_src_reg_xyzw(&temp_inst.Src[0], inst->Src[i].Register.File, inst->Src[i].Register.Index);
memcpy(&temp_inst.Src[0], &inst->Src[i], sizeof(temp_inst.Src[0]));
temp_inst.Src[0].Register.SwizzleX = inst->Src[i].Register.SwizzleX;
temp_inst.Src[0].Register.SwizzleY = inst->Src[i].Register.SwizzleY;
temp_inst.Src[0].Register.SwizzleZ = inst->Src[i].Register.SwizzleZ;
temp_inst.Src[0].Register.SwizzleW = inst->Src[i].Register.SwizzleW;
ctx->emit_instruction(ctx, &temp_inst);
memset(&inst->Src[i], 0, sizeof(inst->Src[i]));
inst->Src[i].Register.File = TGSI_FILE_TEMPORARY;
inst->Src[i].Register.Index = vtctx->src_temp + i;
inst->Src[i].Register.SwizzleX = TGSI_SWIZZLE_X;