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i965: Enable ARB_texture_gather for one component on Gen6.

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Signed-off-by: Chris Forbes <chrisf@ijw.co.nz>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Chris Forbes 2014-02-02 22:00:18 +13:00
parent 31d1077dd2
commit 0c14c5c62a
2 changed files with 3 additions and 1 deletions
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2
src/mesa/drivers/dri/i965/brw_context.c
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@ -374,6 +374,8 @@ brw_initialize_context_constants(struct brw_context *brw)
if (brw->gen >= 7)
ctx->Const.MaxProgramTextureGatherComponents = 4;
else if (brw->gen == 6)
ctx->Const.MaxProgramTextureGatherComponents = 1;
ctx->Const.MinLineWidth = 1.0;
ctx->Const.MinLineWidthAA = 1.0;

2
src/mesa/drivers/dri/i965/intel_extensions.c
View file

@ -270,6 +270,7 @@ intelInitExtensions(struct gl_context *ctx)
ctx->Extensions.ARB_texture_multisample = true;
ctx->Extensions.ARB_sample_shading = true;
ctx->Extensions.ARB_vertex_type_10f_11f_11f_rev = true;
ctx->Extensions.ARB_texture_gather = true;
/* Test if the kernel has the ioctl. */
if (drm_intel_reg_read(brw->bufmgr, TIMESTAMP, &dummy) == 0)
@ -284,7 +285,6 @@ intelInitExtensions(struct gl_context *ctx)
}
if (brw->gen >= 7) {
ctx->Extensions.ARB_texture_gather = true;
ctx->Extensions.ARB_conservative_depth = true;
ctx->Extensions.AMD_vertex_shader_layer = true;
if (can_do_pipelined_register_writes(brw)) {