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radv: write the alpha channel of MRT0 when alpha coverage is enabled

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Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109597
Cc: 18.3 19.0 <mesa-stable@lists.freedesktop.org>
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
(cherry picked from commit 0d8f096293)
This commit is contained in:
Samuel Pitoiset 2019-02-15 18:02:52 +01:00 • committed by Dylan Baker
parent 69ebf4569a
commit 0b9f6ebfbb
1 changed files with 8 additions and 0 deletions
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8
src/amd/vulkan/radv_pipeline.c
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@ -511,6 +511,13 @@ radv_pipeline_compute_spi_color_formats(struct radv_pipeline *pipeline,
if (subpass->color_attachments[i].attachment == VK_ATTACHMENT_UNUSED) {
cf = V_028714_SPI_SHADER_ZERO;
if (blend->need_src_alpha & (1 << i)) {
/* Write the alpha channel of MRT0 when alpha coverage is
* enabled because the depth attachment needs it.
*/
col_format |= V_028714_SPI_SHADER_32_ABGR;
}
} else {
struct radv_render_pass_attachment *attachment = pass->attachments + subpass->color_attachments[i].attachment;
bool blend_enable =
@ -689,6 +696,7 @@ radv_pipeline_init_blend_state(struct radv_pipeline *pipeline,
if (vkms && vkms->alphaToCoverageEnable) {
blend.db_alpha_to_mask |= S_028B70_ALPHA_TO_MASK_ENABLE(1);
blend.need_src_alpha |= 0x1;
}
blend.cb_target_mask = 0;