From 0b97377f5840728daba339b21abf0ca0bb00eb3a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 24 Sep 2019 16:56:57 -0400 Subject: [PATCH] radeonsi/gfx10: fix corruption for chips with harvested TCCs Cc: 19.2 Reviewed-by: Bas Nieuwenhuizen (cherry picked from commit 235ebe91633e7f47518118983e0e6f5c632b25a4) --- src/gallium/drivers/radeonsi/si_pipe.h | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 41a6f5cebae..734763b9d07 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -1700,7 +1700,9 @@ si_make_CB_shader_coherent(struct si_context *sctx, unsigned num_samples, SI_CONTEXT_INV_VCACHE; if (sctx->chip_class >= GFX10) { - if (shaders_read_metadata) + if (sctx->screen->info.tcc_harvested) + sctx->flags |= SI_CONTEXT_INV_L2; + else if (shaders_read_metadata) sctx->flags |= SI_CONTEXT_INV_L2_METADATA; } else if (sctx->chip_class == GFX9) { /* Single-sample color is coherent with shaders on GFX9, but @@ -1726,7 +1728,9 @@ si_make_DB_shader_coherent(struct si_context *sctx, unsigned num_samples, SI_CONTEXT_INV_VCACHE; if (sctx->chip_class >= GFX10) { - if (shaders_read_metadata) + if (sctx->screen->info.tcc_harvested) + sctx->flags |= SI_CONTEXT_INV_L2; + else if (shaders_read_metadata) sctx->flags |= SI_CONTEXT_INV_L2_METADATA; } else if (sctx->chip_class == GFX9) { /* Single-sample depth (not stencil) is coherent with shaders