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tu: implement dynamic depth bias enable

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Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Reviewed-by: Hyunjun Ko <zzoon@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/10434>
This commit is contained in:
Danylo Piliaiev 2021-04-22 19:10:42 +03:00 • committed by Marge Bot
parent 804f1b5664
commit 0b8ed9b55c
2 changed files with 17 additions and 0 deletions
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13
src/freedreno/vulkan/tu_cmd_buffer.c
View file

@ -2469,6 +2469,19 @@ tu_CmdSetStencilOpEXT(VkCommandBuffer commandBuffer,
cmd->state.dirty |= TU_CMD_DIRTY_RB_STENCIL_CNTL;
}
void
tu_CmdSetDepthBiasEnableEXT(VkCommandBuffer commandBuffer,
VkBool32 depthBiasEnable)
{
TU_FROM_HANDLE(tu_cmd_buffer, cmd, commandBuffer);
cmd->state.gras_su_cntl &= ~A6XX_GRAS_SU_CNTL_POLY_OFFSET;
if (depthBiasEnable)
cmd->state.gras_su_cntl |= A6XX_GRAS_SU_CNTL_POLY_OFFSET;
cmd->state.dirty |= TU_CMD_DIRTY_GRAS_SU_CNTL;
}
static void
tu_flush_for_access(struct tu_cache_state *cache,
enum tu_cmd_access_mask src_mask,

4
src/freedreno/vulkan/tu_pipeline.c
View file

@ -2510,6 +2510,10 @@ tu_pipeline_builder_parse_dynamic(struct tu_pipeline_builder *builder,
A6XX_RB_STENCIL_CONTROL_ZFAIL_BF__MASK);
pipeline->dynamic_state_mask |= BIT(TU_DYNAMIC_STATE_RB_STENCIL_CNTL);
break;
case VK_DYNAMIC_STATE_DEPTH_BIAS_ENABLE_EXT:
pipeline->gras_su_cntl_mask &= ~A6XX_GRAS_SU_CNTL_POLY_OFFSET;
pipeline->dynamic_state_mask |= BIT(TU_DYNAMIC_STATE_GRAS_SU_CNTL);
break;
default:
assert(!"unsupported dynamic state");
break;