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radv/ac: frag shader only needs ring offsets if sample positions enabled

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mostly documenting things, since with modern llvm we always have the
spill enabled.

Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie 2017-04-18 05:35:05 +10:00
parent ec4785afb7
commit 0b62669c8d
1 changed files with 4 additions and 1 deletions
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5
src/amd/common/ac_nir_to_llvm.c
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@ -572,10 +572,13 @@ static void create_function(struct nir_to_llvm_context *ctx)
ctx->stage == MESA_SHADER_VERTEX ||
ctx->stage == MESA_SHADER_TESS_CTRL ||
ctx->stage == MESA_SHADER_TESS_EVAL ||
ctx->stage == MESA_SHADER_FRAGMENT ||
ctx->is_gs_copy_shader)
need_ring_offsets = true;
if (ctx->stage == MESA_SHADER_FRAGMENT &&
ctx->shader_info->info.ps.needs_sample_positions)
need_ring_offsets = true;
if (need_ring_offsets && !ctx->options->supports_spill) {
arg_types[arg_idx++] = const_array(ctx->v16i8, 16); /* address of rings */
}