From 0b5c1537aa003a7f7a9f78af4dc9d9a8b7412679 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Sun, 22 Aug 2021 16:32:50 -0400 Subject: [PATCH] radeonsi: don't set edgeflags for TES and blit VS they are disabled (TES) or have no effect (blit VS) Acked-by: Pierre-Eric Pelloux-Prayer Part-of: --- src/gallium/drivers/radeonsi/gfx10_shader_ngg.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c b/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c index dc00d1008d7..7a92ab91feb 100644 --- a/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c +++ b/src/gallium/drivers/radeonsi/gfx10_shader_ngg.c @@ -179,7 +179,12 @@ void gfx10_ngg_build_export_prim(struct si_shader_context *ctx, LLVMValueRef use ngg_get_vertices_per_prim(ctx, &prim.num_vertices); prim.isnull = ctx->ac.i1false; - prim.edgeflags = ac_pack_edgeflags_for_export(&ctx->ac, &ctx->args); + + if (ctx->stage == MESA_SHADER_VERTEX && + !ctx->shader->selector->info.base.vs.blit_sgprs_amd) + prim.edgeflags = ac_pack_edgeflags_for_export(&ctx->ac, &ctx->args); + else + prim.edgeflags = ctx->ac.i32_0; for (unsigned i = 0; i < 3; ++i) prim.index[i] = si_unpack_param(ctx, ctx->args.gs_vtx_offset[i / 2], (i & 1) * 16, 16); @@ -1152,7 +1157,11 @@ void gfx10_emit_ngg_culling_epilogue(struct ac_shader_abi *abi) struct ac_ngg_prim prim = {}; prim.num_vertices = 3; prim.isnull = ctx->ac.i1false; - prim.edgeflags = ac_pack_edgeflags_for_export(&ctx->ac, &ctx->args); + + if (ctx->stage == MESA_SHADER_VERTEX) + prim.edgeflags = ac_pack_edgeflags_for_export(&ctx->ac, &ctx->args); + else + prim.edgeflags = ctx->ac.i32_0; for (unsigned vtx = 0; vtx < 3; vtx++) { prim.index[vtx] = LLVMBuildLoad(