fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-04-19 18:50:43 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 1

vc4: use imm-helpers

Browse source 
Reviewed-by: Juan A. Suarez <jasuarez@igalia.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23855>
This commit is contained in:
Erik Faye-Lund 2023-06-16 15:28:17 +02:00 • committed by Marge Bot
parent 6537b8b40b
commit 0b57f76986
3 changed files with 37 additions and 50 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

34
src/gallium/drivers/vc4/vc4_nir_lower_blend.c
View file

@ -132,8 +132,8 @@ vc4_nir_set_packed_chan(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1,
{
unsigned chan_mask = 0xff << (chan * 8);
return nir_ior(b,
nir_iand(b, src0, nir_imm_int(b, ~chan_mask)),
nir_iand(b, src1, nir_imm_int(b, chan_mask)));
nir_iand_imm(b, src0, ~chan_mask),
nir_iand_imm(b, src1, chan_mask));
}
static nir_ssa_def *
@ -285,8 +285,8 @@ vc4_do_blending_f(struct vc4_compile *c, nir_builder *b, nir_ssa_def **result,
static nir_ssa_def *
vc4_nir_splat(nir_builder *b, nir_ssa_def *src)
{
nir_ssa_def *or1 = nir_ior(b, src, nir_ishl(b, src, nir_imm_int(b, 8)));
return nir_ior(b, or1, nir_ishl(b, or1, nir_imm_int(b, 16)));
nir_ssa_def *or1 = nir_ior(b, src, nir_ishl_imm(b, src, 8));
return nir_ior(b, or1, nir_ishl_imm(b, or1, 16));
}
static nir_ssa_def *
@ -301,7 +301,6 @@ vc4_do_blending_i(struct vc4_compile *c, nir_builder *b,
enum pipe_format color_format = c->fs_key->color_format;
const uint8_t *format_swiz = vc4_get_format_swizzle(color_format);
nir_ssa_def *imm_0xff = nir_imm_int(b, 0xff);
nir_ssa_def *src_a = nir_pack_unorm_4x8(b, src_float_a);
nir_ssa_def *dst_a;
int alpha_chan;
@ -310,9 +309,9 @@ vc4_do_blending_i(struct vc4_compile *c, nir_builder *b,
break;
}
if (alpha_chan != 4) {
nir_ssa_def *shift = nir_imm_int(b, alpha_chan * 8);
dst_a = vc4_nir_splat(b, nir_iand(b, nir_ushr(b, dst_color,
shift), imm_0xff));
dst_a = vc4_nir_splat(b, nir_iand_imm(b, nir_ushr_imm(b, dst_color,
alpha_chan * 8),
0xff));
} else {
dst_a = nir_imm_int(b, ~0);
}
@ -498,10 +497,8 @@ vc4_nir_blend_pipeline(struct vc4_compile *c, nir_builder *b, nir_ssa_def *src,
}
return nir_ior(b,
nir_iand(b, packed_color,
nir_imm_int(b, colormask)),
nir_iand(b, packed_dst_color,
nir_imm_int(b, ~colormask)));
nir_iand_imm(b, packed_color, colormask),
nir_iand_imm(b, packed_dst_color, ~colormask));
}
static void
@ -530,13 +527,12 @@ vc4_nir_lower_blend_instr(struct vc4_compile *c, nir_builder *b,
/* XXX: We should do a nice dither based on the fragment
* coordinate, instead.
*/
nir_ssa_def *num_samples = nir_imm_float(b, VC4_MAX_SAMPLES);
nir_ssa_def *num_bits = nir_f2i32(b, nir_fmul(b, a, num_samples));
nir_ssa_def *bitmask = nir_isub(b,
nir_ishl(b,
nir_imm_int(b, 1),
num_bits),
nir_imm_int(b, 1));
nir_ssa_def *num_bits = nir_f2i32(b, nir_fmul_imm(b, a, VC4_MAX_SAMPLES));
nir_ssa_def *bitmask = nir_iadd_imm(b,
nir_ishl(b,
nir_imm_int(b, 1),
num_bits),
-1);
vc4_nir_store_sample_mask(c, b, bitmask);
}

7
src/gallium/drivers/vc4/vc4_nir_lower_io.c
View file

@ -77,9 +77,9 @@ static nir_ssa_def *
vc4_nir_unpack_16u(nir_builder *b, nir_ssa_def *src, unsigned chan)
{
if (chan == 0) {
return nir_iand(b, src, nir_imm_int(b, 0xffff));
return nir_iand_imm(b, src, 0xffff);
} else {
return nir_ushr(b, src, nir_imm_int(b, 16));
return nir_ushr_imm(b, src, 16);
}
}
@ -313,8 +313,7 @@ vc4_nir_lower_uniform(struct vc4_compile *c, nir_builder *b,
nir_intrinsic_range(intr) * 16 - i * 4);
intr_comp->src[0] =
nir_src_for_ssa(nir_ishl(b, intr->src[0].ssa,
nir_imm_int(b, 4)));
nir_src_for_ssa(nir_ishl_imm(b, intr->src[0].ssa, 4));
dests[i] = &intr_comp->dest.ssa;

46
src/gallium/drivers/vc4/vc4_nir_lower_txf_ms.c
View file

@ -80,38 +80,30 @@ vc4_nir_lower_txf_ms_instr(nir_builder *b, nir_instr *instr, void *data)
uint32_t w = align(c->key->tex[unit].msaa_width, tile_w);
uint32_t w_tiles = w / tile_w;
nir_ssa_def *x_tile = nir_ushr(b, x, nir_imm_int(b, tile_w_shift));
nir_ssa_def *y_tile = nir_ushr(b, y, nir_imm_int(b, tile_h_shift));
nir_ssa_def *x_tile = nir_ushr_imm(b, x, tile_w_shift);
nir_ssa_def *y_tile = nir_ushr_imm(b, y, tile_h_shift);
nir_ssa_def *tile_addr = nir_iadd(b,
nir_imul(b, x_tile,
nir_imm_int(b, tile_size)),
nir_imul(b, y_tile,
nir_imm_int(b, (w_tiles *
tile_size))));
nir_ssa_def *x_subspan = nir_iand(b, x,
nir_imm_int(b, (tile_w - 1) & ~1));
nir_ssa_def *y_subspan = nir_iand(b, y,
nir_imm_int(b, (tile_h - 1) & ~1));
nir_imul_imm(b, x_tile, tile_size),
nir_imul_imm(b, y_tile, w_tiles *
tile_size));
nir_ssa_def *x_subspan = nir_iand_imm(b, x, (tile_w - 1) & ~1);
nir_ssa_def *y_subspan = nir_iand_imm(b, y, (tile_h - 1) & ~1);
nir_ssa_def *subspan_addr = nir_iadd(b,
nir_imul(b, x_subspan,
nir_imm_int(b, 2 * VC4_MAX_SAMPLES * sizeof(uint32_t))),
nir_imul(b, y_subspan,
nir_imm_int(b,
tile_w *
VC4_MAX_SAMPLES *
sizeof(uint32_t))));
nir_imul_imm(b, x_subspan,
2 * VC4_MAX_SAMPLES * sizeof(uint32_t)),
nir_imul_imm(b, y_subspan,
tile_w * VC4_MAX_SAMPLES *
sizeof(uint32_t)));
nir_ssa_def *pixel_addr = nir_ior(b,
nir_iand(b,
nir_ishl(b, x,
nir_imm_int(b, 2)),
nir_imm_int(b, (1 << 2))),
nir_iand(b,
nir_ishl(b, y,
nir_imm_int(b, 3)),
nir_imm_int(b, (1 << 3))));
nir_iand_imm(b,
nir_ishl_imm(b, x, 2),
1 << 2),
nir_iand_imm(b,
nir_ishl_imm(b, y, 3),
1 << 3));
nir_ssa_def *sample_addr = nir_ishl(b, sample_index, nir_imm_int(b, 4));
nir_ssa_def *sample_addr = nir_ishl_imm(b, sample_index, 4);
nir_ssa_def *addr = nir_iadd(b,
nir_ior(b, sample_addr, pixel_addr),