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anv: Add CCS cache flush bits to anv_pipe_bits

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This will help us to flush the entries out of the CCS cache.

v2:
- Move enum value close to HW bits section (Lionel)

Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23786>
This commit is contained in:
Sagar Ghuge 2023-06-20 21:09:26 -07:00
parent f592727130
commit 0b42a6c3b5
3 changed files with 9 additions and 0 deletions
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5
src/intel/vulkan/anv_private.h
View file

@ -2201,6 +2201,11 @@ enum anv_pipe_bits {
*/
ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT = (1 << 16),
/* This bit controls the flushing of the engine (Render, Compute) specific
* entries from the compression cache.
*/
ANV_PIPE_CCS_CACHE_FLUSH_BIT = (1 << 17),
ANV_PIPE_CS_STALL_BIT = (1 << 20),
ANV_PIPE_END_OF_PIPE_SYNC_BIT = (1 << 21),

2
src/intel/vulkan/anv_util.c
View file

@ -90,4 +90,6 @@ anv_dump_pipe_bits(enum anv_pipe_bits bits, FILE *f)
fputs("+cs_stall ", f);
if (bits & ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT)
fputs("+utdp_flush", f);
if (bits & ANV_PIPE_CCS_CACHE_FLUSH_BIT)
fputs("+ccs_flush ", f);
}

2
src/intel/vulkan/genX_cmd_buffer.c
View file

@ -77,6 +77,7 @@ convert_pc_to_bits(struct GENX(PIPE_CONTROL) *pc) {
bits |= (pc->CommandStreamerStallEnable) ? ANV_PIPE_CS_STALL_BIT : 0;
#if GFX_VERx10 == 125
bits |= (pc->UntypedDataPortCacheFlushEnable) ? ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT : 0;
bits |= (pc->CCSFlushEnable) ? ANV_PIPE_CCS_CACHE_FLUSH_BIT : 0;
#endif
return bits;
}
@ -3132,6 +3133,7 @@ genX(batch_emit_pipe_control_write)(struct anv_batch *batch,
#if GFX_VERx10 >= 125
pipe.UntypedDataPortCacheFlushEnable =
bits & ANV_PIPE_UNTYPED_DATAPORT_CACHE_FLUSH_BIT;
pipe.CCSFlushEnable = bits & ANV_PIPE_CCS_CACHE_FLUSH_BIT;
#endif
#if GFX_VER >= 12
pipe.TileCacheFlushEnable = bits & ANV_PIPE_TILE_CACHE_FLUSH_BIT;