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dzn: Support dynamic depth bias via command list instead of PSO

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Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22606>
This commit is contained in:
Jesse Natalie 2023-04-20 10:15:09 -07:00 • committed by Marge Bot
parent c6bc4459e5
commit 0b3f2a3c7d
4 changed files with 63 additions and 15 deletions
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23
src/microsoft/vulkan/dzn_cmd_buffer.c
View file

@ -395,6 +395,9 @@ dzn_cmd_buffer_destroy(struct vk_command_buffer *cbuf)
if (cmdbuf->cmdlist8)
ID3D12GraphicsCommandList8_Release(cmdbuf->cmdlist8);
if (cmdbuf->cmdlist9)
ID3D12GraphicsCommandList9_Release(cmdbuf->cmdlist9);
if (cmdbuf->cmdalloc)
ID3D12CommandAllocator_Release(cmdbuf->cmdalloc);
@ -660,6 +663,7 @@ dzn_cmd_buffer_create(const VkCommandBufferAllocateInfo *info,
}
(void)ID3D12GraphicsCommandList_QueryInterface(cmdbuf->cmdlist, &IID_ID3D12GraphicsCommandList8, (void **)&cmdbuf->cmdlist8);
(void)ID3D12GraphicsCommandList_QueryInterface(cmdbuf->cmdlist, &IID_ID3D12GraphicsCommandList9, (void **)&cmdbuf->cmdlist9);
cmdbuf->type = type;
cmdbuf->valid_sync = cmd_buffer_valid_sync[type];
@ -3470,6 +3474,18 @@ dzn_cmd_buffer_update_depth_bounds(struct dzn_cmd_buffer *cmdbuf)
}
}
static void
dzn_cmd_buffer_update_depth_bias(struct dzn_cmd_buffer *cmdbuf)
{
if (cmdbuf->state.dirty & DZN_CMD_DIRTY_DEPTH_BIAS) {
assert(cmdbuf->cmdlist9);
ID3D12GraphicsCommandList9_RSSetDepthBias(cmdbuf->cmdlist9,
cmdbuf->state.pipeline_variant.depth_bias.constant_factor,
cmdbuf->state.pipeline_variant.depth_bias.clamp,
cmdbuf->state.pipeline_variant.depth_bias.slope_factor);
}
}
static VkResult
dzn_cmd_buffer_triangle_fan_create_index(struct dzn_cmd_buffer *cmdbuf, uint32_t *vertex_count)
{
@ -3620,6 +3636,7 @@ dzn_cmd_buffer_prepare_draw(struct dzn_cmd_buffer *cmdbuf, bool indexed)
dzn_cmd_buffer_update_zsa(cmdbuf);
dzn_cmd_buffer_update_blend_constants(cmdbuf);
dzn_cmd_buffer_update_depth_bounds(cmdbuf);
dzn_cmd_buffer_update_depth_bias(cmdbuf);
/* Reset the dirty states */
cmdbuf->state.bindpoint[VK_PIPELINE_BIND_POINT_GRAPHICS].dirty &= DZN_CMD_BINDPOINT_DIRTY_HEAPS;
@ -5666,11 +5683,15 @@ dzn_CmdSetDepthBias(VkCommandBuffer commandBuffer,
float depthBiasSlopeFactor)
{
VK_FROM_HANDLE(dzn_cmd_buffer, cmdbuf, commandBuffer);
struct dzn_physical_device *pdev = container_of(cmdbuf->vk.base.device->physical, struct dzn_physical_device, vk);
cmdbuf->state.pipeline_variant.depth_bias.constant_factor = depthBiasConstantFactor;
cmdbuf->state.pipeline_variant.depth_bias.clamp = depthBiasClamp;
cmdbuf->state.pipeline_variant.depth_bias.slope_factor = depthBiasSlopeFactor;
cmdbuf->state.bindpoint[VK_PIPELINE_BIND_POINT_GRAPHICS].dirty |= DZN_CMD_BINDPOINT_DIRTY_PIPELINE;
if (pdev->options16.DynamicDepthBiasSupported)
cmdbuf->state.dirty |= DZN_CMD_DIRTY_DEPTH_BIAS;
else
cmdbuf->state.bindpoint[VK_PIPELINE_BIND_POINT_GRAPHICS].dirty |= DZN_CMD_BINDPOINT_DIRTY_PIPELINE;
}
VKAPI_ATTR void VKAPI_CALL

1
src/microsoft/vulkan/dzn_device.c
View file

@ -454,6 +454,7 @@ dzn_physical_device_cache_caps(struct dzn_physical_device *pdev)
ID3D12Device1_CheckFeatureSupport(pdev->dev, D3D12_FEATURE_D3D12_OPTIONS13, &pdev->options13, sizeof(pdev->options13));
ID3D12Device1_CheckFeatureSupport(pdev->dev, D3D12_FEATURE_D3D12_OPTIONS14, &pdev->options14, sizeof(pdev->options14));
ID3D12Device1_CheckFeatureSupport(pdev->dev, D3D12_FEATURE_D3D12_OPTIONS15, &pdev->options15, sizeof(pdev->options15));
ID3D12Device1_CheckFeatureSupport(pdev->dev, D3D12_FEATURE_D3D12_OPTIONS16, &pdev->options16, sizeof(pdev->options16));
ID3D12Device1_CheckFeatureSupport(pdev->dev, D3D12_FEATURE_D3D12_OPTIONS17, &pdev->options17, sizeof(pdev->options17));
if (FAILED(ID3D12Device1_CheckFeatureSupport(pdev->dev, D3D12_FEATURE_D3D12_OPTIONS19, &pdev->options19, sizeof(pdev->options19)))) {
pdev->options19.MaxSamplerDescriptorHeapSize = D3D12_MAX_SHADER_VISIBLE_SAMPLER_HEAP_SIZE;

46
src/microsoft/vulkan/dzn_pipeline.c
View file

@ -51,16 +51,19 @@
__wrapper = (void *)((uint8_t *)(__stream)->pPipelineStateSubobjectStream + (__stream)->SizeInBytes); \
(__stream)->SizeInBytes += sizeof(*__wrapper); \
assert((__stream)->SizeInBytes <= __maxstreamsz); \
__wrapper->type = D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_ ## __id; \
__wrapper->type = __id; \
__desc = &__wrapper->desc; \
memset(__desc, 0, sizeof(*__desc)); \
} while (0)
#define d3d12_pipeline_state_stream_new_desc_abbrev(__stream, __maxstreamsz, __id, __type, __desc) \
d3d12_pipeline_state_stream_new_desc(__stream, __maxstreamsz, D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_ ## __id, __type, __desc)
#define d3d12_gfx_pipeline_state_stream_new_desc(__stream, __id, __type, __desc) \
d3d12_pipeline_state_stream_new_desc(__stream, MAX_GFX_PIPELINE_STATE_STREAM_SIZE, __id, __type, __desc)
d3d12_pipeline_state_stream_new_desc_abbrev(__stream, MAX_GFX_PIPELINE_STATE_STREAM_SIZE, __id, __type, __desc)
#define d3d12_compute_pipeline_state_stream_new_desc(__stream, __id, __type, __desc) \
d3d12_pipeline_state_stream_new_desc(__stream, MAX_COMPUTE_PIPELINE_STATE_STREAM_SIZE, __id, __type, __desc)
d3d12_pipeline_state_stream_new_desc_abbrev(__stream, MAX_COMPUTE_PIPELINE_STATE_STREAM_SIZE, __id, __type, __desc)
static bool
gfx_pipeline_variant_key_equal(const void *a, const void *b)
@ -1282,10 +1285,12 @@ translate_depth_bias(double depth_bias)
}
static void
dzn_graphics_pipeline_translate_rast(struct dzn_graphics_pipeline *pipeline,
dzn_graphics_pipeline_translate_rast(struct dzn_device *device,
struct dzn_graphics_pipeline *pipeline,
D3D12_PIPELINE_STATE_STREAM_DESC *out,
const VkGraphicsPipelineCreateInfo *in)
{
struct dzn_physical_device *pdev = container_of(device->vk.physical, struct dzn_physical_device, vk);
const VkPipelineRasterizationStateCreateInfo *in_rast =
in->pRasterizationState;
const VkPipelineViewportStateCreateInfo *in_vp =
@ -1307,7 +1312,11 @@ dzn_graphics_pipeline_translate_rast(struct dzn_graphics_pipeline *pipeline,
}
}
d3d12_gfx_pipeline_state_stream_new_desc(out, RASTERIZER, D3D12_RASTERIZER_DESC, desc);
static_assert(sizeof(D3D12_RASTERIZER_DESC) == sizeof(D3D12_RASTERIZER_DESC1), "Casting between these");
D3D12_PIPELINE_STATE_SUBOBJECT_TYPE rast_type = pdev->options16.DynamicDepthBiasSupported ?
D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_RASTERIZER1 :
D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_RASTERIZER;
d3d12_pipeline_state_stream_new_desc(out, MAX_GFX_PIPELINE_STATE_STREAM_SIZE, rast_type, D3D12_RASTERIZER_DESC, desc);
pipeline->templates.desc_offsets.rast =
(uintptr_t)desc - (uintptr_t)out->pPipelineStateSubobjectStream;
desc->DepthClipEnable = !in_rast->depthClampEnable;
@ -1316,7 +1325,10 @@ dzn_graphics_pipeline_translate_rast(struct dzn_graphics_pipeline *pipeline,
desc->FrontCounterClockwise =
in_rast->frontFace == VK_FRONT_FACE_COUNTER_CLOCKWISE;
if (in_rast->depthBiasEnable) {
desc->DepthBias = translate_depth_bias(in_rast->depthBiasConstantFactor);
if (rast_type == D3D12_PIPELINE_STATE_SUBOBJECT_TYPE_RASTERIZER1)
((D3D12_RASTERIZER_DESC1 *)desc)->DepthBias = in_rast->depthBiasConstantFactor;
else
desc->DepthBias = translate_depth_bias(in_rast->depthBiasConstantFactor);
desc->SlopeScaledDepthBias = in_rast->depthBiasSlopeFactor;
desc->DepthBiasClamp = in_rast->depthBiasClamp;
}
@ -1710,8 +1722,8 @@ dzn_pipeline_init(struct dzn_pipeline *pipeline,
MAX_GFX_PIPELINE_STATE_STREAM_SIZE :
MAX_COMPUTE_PIPELINE_STATE_STREAM_SIZE;
d3d12_pipeline_state_stream_new_desc(stream_desc, max_streamsz, ROOT_SIGNATURE,
ID3D12RootSignature *, root_sig);
d3d12_pipeline_state_stream_new_desc_abbrev(stream_desc, max_streamsz, ROOT_SIGNATURE,
ID3D12RootSignature *, root_sig);
*root_sig = pipeline->root.sig;
}
@ -1817,6 +1829,9 @@ dzn_graphics_pipeline_create(struct dzn_device *device,
if (ret != VK_SUCCESS)
goto out;
d3d12_gfx_pipeline_state_stream_new_desc(stream_desc, FLAGS, D3D12_PIPELINE_STATE_FLAGS, flags);
*flags = D3D12_PIPELINE_STATE_FLAG_NONE;
if (pCreateInfo->pDynamicState) {
for (uint32_t i = 0; i < pCreateInfo->pDynamicState->dynamicStateCount; i++) {
switch (pCreateInfo->pDynamicState->pDynamicStates[i]) {
@ -1848,10 +1863,14 @@ dzn_graphics_pipeline_create(struct dzn_device *device,
pipeline->zsa.depth_bounds.dynamic = true;
break;
case VK_DYNAMIC_STATE_DEPTH_BIAS:
pipeline->zsa.dynamic_depth_bias = true;
ret = dzn_graphics_pipeline_prepare_for_variants(device, pipeline);
if (ret)
goto out;
if (pdev->options16.DynamicDepthBiasSupported) {
*flags |= D3D12_PIPELINE_STATE_FLAG_DYNAMIC_DEPTH_BIAS;
} else {
pipeline->zsa.dynamic_depth_bias = true;
ret = dzn_graphics_pipeline_prepare_for_variants(device, pipeline);
if (ret)
goto out;
}
break;
case VK_DYNAMIC_STATE_LINE_WIDTH:
/* Nothing to do since we just support lineWidth = 1. */
@ -1865,7 +1884,7 @@ dzn_graphics_pipeline_create(struct dzn_device *device,
if (ret)
goto out;
dzn_graphics_pipeline_translate_rast(pipeline, stream_desc, pCreateInfo);
dzn_graphics_pipeline_translate_rast(device, pipeline, stream_desc, pCreateInfo);
dzn_graphics_pipeline_translate_ms(pipeline, stream_desc, pCreateInfo);
dzn_graphics_pipeline_translate_zsa(device, pipeline, stream_desc, pCreateInfo);
dzn_graphics_pipeline_translate_blend(pipeline, stream_desc, pCreateInfo);
@ -2138,6 +2157,7 @@ dzn_graphics_pipeline_get_state(struct dzn_graphics_pipeline *pipeline,
D3D12_RASTERIZER_DESC *rast =
dzn_graphics_pipeline_get_desc(pipeline, stream_buf, rast);
if (rast && pipeline->zsa.dynamic_depth_bias) {
assert(!pdev->options16.DynamicDepthBiasSupported);
rast->DepthBias = translate_depth_bias(masked_key.depth_bias.constant_factor);
rast->DepthBiasClamp = masked_key.depth_bias.clamp;
rast->SlopeScaledDepthBias = masked_key.depth_bias.slope_factor;

8
src/microsoft/vulkan/dzn_private.h
View file

@ -216,6 +216,7 @@ struct dzn_physical_device {
D3D12_FEATURE_DATA_D3D12_OPTIONS13 options13;
D3D12_FEATURE_DATA_D3D12_OPTIONS14 options14;
D3D12_FEATURE_DATA_D3D12_OPTIONS15 options15;
D3D12_FEATURE_DATA_D3D12_OPTIONS16 options16;
D3D12_FEATURE_DATA_D3D12_OPTIONS17 options17;
D3D12_FEATURE_DATA_D3D12_OPTIONS19 options19;
VkPhysicalDeviceMemoryProperties memory;
@ -378,6 +379,7 @@ enum dzn_cmd_dirty {
DZN_CMD_DIRTY_STENCIL_WRITE_MASK = 1 << 5,
DZN_CMD_DIRTY_BLEND_CONSTANTS = 1 << 6,
DZN_CMD_DIRTY_DEPTH_BOUNDS = 1 << 7,
DZN_CMD_DIRTY_DEPTH_BIAS = 1 << 8,
};
#define MAX_VBS D3D12_IA_VERTEX_INPUT_RESOURCE_SLOT_COUNT
@ -698,6 +700,7 @@ struct dzn_cmd_buffer {
ID3D12CommandAllocator *cmdalloc;
ID3D12GraphicsCommandList1 *cmdlist;
ID3D12GraphicsCommandList8 *cmdlist8;
ID3D12GraphicsCommandList9 *cmdlist9;
D3D12_COMMAND_LIST_TYPE type;
D3D12_BARRIER_SYNC valid_sync;
@ -866,6 +869,8 @@ enum dzn_register_space {
static_assert(sizeof(D3D12_DEPTH_STENCIL_DESC2) > sizeof(D3D12_DEPTH_STENCIL_DESC1),
"Using just one of these descs in the max size calculation");
static_assert(sizeof(D3D12_RASTERIZER_DESC) == sizeof(D3D12_RASTERIZER_DESC1),
"Using just one of these descs in the max size calculation");
#define MAX_GFX_PIPELINE_STATE_STREAM_SIZE \
D3D12_PIPELINE_STATE_STREAM_DESC_SIZE(ID3D12RootSignature *) + \
@ -884,7 +889,8 @@ static_assert(sizeof(D3D12_DEPTH_STENCIL_DESC2) > sizeof(D3D12_DEPTH_STENCIL_DES
D3D12_PIPELINE_STATE_STREAM_DESC_SIZE(D3D12_CACHED_PIPELINE_STATE) + \
D3D12_PIPELINE_STATE_STREAM_DESC_SIZE(D3D12_PIPELINE_STATE_FLAGS) + \
D3D12_PIPELINE_STATE_STREAM_DESC_SIZE(D3D12_DEPTH_STENCIL_DESC2) + \
D3D12_PIPELINE_STATE_STREAM_DESC_SIZE(D3D12_VIEW_INSTANCING_DESC)
D3D12_PIPELINE_STATE_STREAM_DESC_SIZE(D3D12_VIEW_INSTANCING_DESC) + \
D3D12_PIPELINE_STATE_STREAM_DESC_SIZE(D3D12_PIPELINE_STATE_FLAGS)
#define MAX_COMPUTE_PIPELINE_STATE_STREAM_SIZE \
D3D12_PIPELINE_STATE_STREAM_DESC_SIZE(ID3D12RootSignature *) + \