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radeonsi: use si_assign_param_offsets for legacy GS too

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The result of that function was overwritten by other code, so just remove it.

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Acked-by: Timur Kristóf <timur.kristof@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35529>
This commit is contained in:
Marek Olšák 2025-06-01 17:09:08 -04:00 • committed by Marge Bot
parent cc497fd0e4
commit 0b3b105bde
3 changed files with 4 additions and 25 deletions
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20
src/gallium/drivers/radeonsi/si_shader.c
View file

@ -1300,7 +1300,6 @@ static void si_assign_param_offsets(nir_shader *nir, struct si_shader *shader,
temp_info->vs_output_param_offset);
/* Assign the non-constant outputs. */
/* TODO: Use this for the GS copy shader too. */
si_nir_assign_param_offsets(nir, shader, slot_remap, temp_info);
/* Any unwritten output will default to (0,0,0,0). */
@ -1567,23 +1566,8 @@ static void run_late_optimization_and_lowering_passes(struct si_nir_shader_ctx *
}
progress = true;
} else if (nir->info.stage == MESA_SHADER_GEOMETRY && !key->ge.as_ngg) {
STATIC_ASSERT(sizeof(ctx->temp_info.vs_output_param_offset[0]) == 1);
memset(ctx->temp_info.vs_output_param_offset, AC_EXP_PARAM_DEFAULT_VAL_0000,
sizeof(ctx->temp_info.vs_output_param_offset));
for (unsigned i = 0; i < sel->info.num_outputs; i++) {
unsigned semantic = sel->info.output_semantic[i];
/* Skip if no channel writes to stream 0. */
if (!nir_slot_is_varying(semantic, MESA_SHADER_FRAGMENT) ||
(sel->info.output_streams[i] & 0x03 && /* whether component 0 writes to non-zero stream */
sel->info.output_streams[i] & 0x0c && /* whether component 1 writes to non-zero stream */
sel->info.output_streams[i] & 0x30 && /* whether component 2 writes to non-zero stream */
sel->info.output_streams[i] & 0xc0)) /* whether component 3 writes to non-zero stream */
continue;
ctx->temp_info.vs_output_param_offset[semantic] = shader->info.nr_param_exports++;
}
/* Assign param export indices. */
si_assign_param_offsets(nir, shader, &ctx->temp_info);
ac_nir_lower_legacy_gs_options options = {
.has_gen_prim_query = false,

8
src/gallium/drivers/radeonsi/si_shader_info.c
View file

@ -165,17 +165,13 @@ static void scan_io_usage(const nir_shader *nir, struct si_shader_info *info,
/* Output stores. */
unsigned gs_streams = (uint32_t)nir_intrinsic_io_semantics(intr).gs_streams <<
(nir_intrinsic_component(intr) * 2);
unsigned new_mask = mask & ~info->output_usagemask[loc];
/* Iterate over all components. */
for (unsigned i = 0; i < 4; i++) {
u_foreach_bit(i, mask) {
unsigned stream = (gs_streams >> (i * 2)) & 0x3;
if (new_mask && stream == 0)
if (stream == 0)
info->gs_writes_stream0 = true;
if (new_mask & (1 << i))
info->output_streams[loc] |= stream << (i * 2);
}
if (nir_intrinsic_has_src_type(intr))

1
src/gallium/drivers/radeonsi/si_shader_info.h
View file

@ -92,7 +92,6 @@ struct si_shader_info {
struct si_vs_tcs_input_info input[PIPE_MAX_SHADER_INPUTS];
uint8_t output_semantic[PIPE_MAX_SHADER_OUTPUTS];
uint8_t output_usagemask[PIPE_MAX_SHADER_OUTPUTS];
uint8_t output_streams[PIPE_MAX_SHADER_OUTPUTS];
uint8_t output_type[PIPE_MAX_SHADER_OUTPUTS]; /* enum nir_alu_type */
uint8_t num_vs_inputs;