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svga: assorted code clean-ups

Browse source 
- formatting clean-ups, remove tabs, trailing whitespace.
- move var decls into loops or closer to where they're used.
- add const qualifiers.

No functional changes.

Signed-off-by: Brian Paul <brian.paul@broadcom.com>
Reviewed-by: Neha Bhende <neha.bhende@broadcom.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35579>
This commit is contained in:
Brian Paul 2025-05-29 10:00:59 -06:00 • committed by Marge Bot
parent 5bc840ea62
commit 0b2b51cf1c
39 changed files with 1092 additions and 1190 deletions
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45
src/gallium/drivers/svga/svga_cmd.c
View file

@ -49,8 +49,7 @@ surface_to_surfaceid(struct svga_winsys_context *swc, // IN
swc->surface_relocation(swc, &id->sid, NULL, s->handle, flags);
id->face = s->real_layer; /* faces have the same order */
id->mipmap = s->real_level;
}
else {
} else {
swc->surface_relocation(swc, &id->sid, NULL, NULL, flags);
id->face = 0;
id->mipmap = 0;
@ -354,7 +353,7 @@ SVGA3D_DestroySurface(struct svga_winsys_context *swc,
SVGA_3D_CMD_SURFACE_DESTROY, sizeof *cmd, 1);
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
swc->surface_relocation(swc, &cmd->sid, NULL, sid,
SVGA_RELOC_WRITE | SVGA_RELOC_INTERNAL);
swc->commit(swc);
@ -425,12 +424,10 @@ SVGA3D_SurfaceDMA(struct svga_winsys_context *swc,
if (transfer == SVGA3D_WRITE_HOST_VRAM) {
region_flags = SVGA_RELOC_READ;
surface_flags = SVGA_RELOC_WRITE;
}
else if (transfer == SVGA3D_READ_HOST_VRAM) {
} else if (transfer == SVGA3D_READ_HOST_VRAM) {
region_flags = SVGA_RELOC_WRITE;
surface_flags = SVGA_RELOC_READ;
}
else {
} else {
assert(0);
return PIPE_ERROR_BAD_INPUT;
}
@ -481,18 +478,16 @@ SVGA3D_BufferDMA(struct svga_winsys_context *swc,
SVGA3dCmdSurfaceDMASuffix *pSuffix;
unsigned region_flags;
unsigned surface_flags;
assert(!swc->have_gb_objects);
if (transfer == SVGA3D_WRITE_HOST_VRAM) {
region_flags = SVGA_RELOC_READ;
surface_flags = SVGA_RELOC_WRITE;
}
else if (transfer == SVGA3D_READ_HOST_VRAM) {
} else if (transfer == SVGA3D_READ_HOST_VRAM) {
region_flags = SVGA_RELOC_WRITE;
surface_flags = SVGA_RELOC_READ;
}
else {
} else {
assert(0);
return PIPE_ERROR_BAD_INPUT;
}
@ -1369,7 +1364,7 @@ SVGA3D_BeginSetRenderState(struct svga_winsys_context *swc,
static enum pipe_error
SVGA3D_BeginGBQuery(struct svga_winsys_context *swc,
SVGA3dQueryType type) // IN
SVGA3dQueryType type) // IN
{
SVGA3dCmdBeginGBQuery *cmd;
@ -1448,8 +1443,8 @@ SVGA3D_BeginQuery(struct svga_winsys_context *swc,
static enum pipe_error
SVGA3D_EndGBQuery(struct svga_winsys_context *swc,
SVGA3dQueryType type, // IN
struct svga_winsys_buffer *buffer) // IN/OUT
SVGA3dQueryType type, // IN
struct svga_winsys_buffer *buffer) // IN/OUT
{
SVGA3dCmdEndGBQuery *cmd;
@ -1464,10 +1459,10 @@ SVGA3D_EndGBQuery(struct svga_winsys_context *swc,
cmd->type = type;
swc->mob_relocation(swc, &cmd->mobid, &cmd->offset, buffer,
0, SVGA_RELOC_READ | SVGA_RELOC_WRITE);
0, SVGA_RELOC_READ | SVGA_RELOC_WRITE);
swc->commit(swc);
return PIPE_OK;
}
@ -1535,8 +1530,8 @@ SVGA3D_EndQuery(struct svga_winsys_context *swc,
static enum pipe_error
SVGA3D_WaitForGBQuery(struct svga_winsys_context *swc,
SVGA3dQueryType type, // IN
struct svga_winsys_buffer *buffer) // IN/OUT
SVGA3dQueryType type, // IN
struct svga_winsys_buffer *buffer) // IN/OUT
{
SVGA3dCmdWaitForGBQuery *cmd;
@ -1551,7 +1546,7 @@ SVGA3D_WaitForGBQuery(struct svga_winsys_context *swc,
cmd->type = type;
swc->mob_relocation(swc, &cmd->mobid, &cmd->offset, buffer,
0, SVGA_RELOC_READ | SVGA_RELOC_WRITE);
0, SVGA_RELOC_READ | SVGA_RELOC_WRITE);
swc->commit(swc);
@ -1613,7 +1608,7 @@ enum pipe_error
SVGA3D_BindGBShader(struct svga_winsys_context *swc,
struct svga_winsys_gb_shader *gbshader)
{
SVGA3dCmdBindGBShader *cmd =
SVGA3dCmdBindGBShader *cmd =
SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_BIND_GB_SHADER,
sizeof *cmd,
@ -1623,7 +1618,7 @@ SVGA3D_BindGBShader(struct svga_winsys_context *swc,
return PIPE_ERROR_OUT_OF_MEMORY;
swc->shader_relocation(swc, &cmd->shid, &cmd->mobid,
&cmd->offsetInBytes, gbshader, 0);
&cmd->offsetInBytes, gbshader, 0);
swc->commit(swc);
@ -1639,14 +1634,14 @@ SVGA3D_SetGBShader(struct svga_winsys_context *swc,
SVGA3dCmdSetShader *cmd;
assert(type == SVGA3D_SHADERTYPE_VS || type == SVGA3D_SHADERTYPE_PS);
cmd = SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_SET_SHADER,
sizeof *cmd,
2); /* two relocations */
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
cmd->cid = swc->cid;
cmd->type = type;
if (gbshader)
@ -1666,7 +1661,7 @@ enum pipe_error
SVGA3D_BindGBSurface(struct svga_winsys_context *swc,
struct svga_winsys_surface *surface)
{
SVGA3dCmdBindGBSurface *cmd =
SVGA3dCmdBindGBSurface *cmd =
SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_BIND_GB_SURFACE,
sizeof *cmd,

172
src/gallium/drivers/svga/svga_cmd_vgpu10.c
View file

@ -35,8 +35,7 @@ view_relocation(struct svga_winsys_context *swc, // IN
struct svga_surface *s = svga_surface(surface);
assert(s->handle);
swc->surface_relocation(swc, id, NULL, s->handle, flags);
}
else {
} else {
swc->surface_relocation(swc, id, NULL, NULL, flags);
}
}
@ -53,8 +52,7 @@ surface_to_resourceid(struct svga_winsys_context *swc, // IN
{
if (surface) {
swc->surface_relocation(swc, sid, NULL, surface, flags);
}
else {
} else {
swc->surface_relocation(swc, sid, NULL, NULL, flags);
}
}
@ -243,15 +241,12 @@ SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context *swc,
const SVGA3dShaderResourceViewId ids[],
struct svga_winsys_surface **views)
{
SVGA3dCmdDXSetShaderResources *cmd;
SVGA3dShaderResourceViewId *cmd_ids;
unsigned i;
cmd = SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
sizeof(SVGA3dCmdDXSetShaderResources) +
count * sizeof(SVGA3dShaderResourceViewId),
count); /* 'count' relocations */
SVGA3dCmdDXSetShaderResources *cmd =
SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
sizeof(SVGA3dCmdDXSetShaderResources) +
count * sizeof(SVGA3dShaderResourceViewId),
count); /* 'count' relocations */
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
@ -259,8 +254,9 @@ SVGA3D_vgpu10_SetShaderResources(struct svga_winsys_context *swc,
cmd->type = type;
cmd->startView = startView;
cmd_ids = (SVGA3dShaderResourceViewId *) (cmd + 1);
for (i = 0; i < count; i++) {
SVGA3dShaderResourceViewId *cmd_ids =
(SVGA3dShaderResourceViewId *) (cmd + 1);
for (unsigned i = 0; i < count; i++) {
swc->surface_relocation(swc, cmd_ids + i, NULL, views[i],
SVGA_RELOC_READ);
cmd_ids[i] = ids[i];
@ -327,18 +323,15 @@ SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,
struct pipe_surface *depth_stencil_surf)
{
const unsigned surf_count = color_count + 1;
SVGA3dCmdDXSetRenderTargets *cmd;
SVGA3dRenderTargetViewId *ctarget;
struct svga_surface *ss;
unsigned i;
assert(surf_count > 0);
cmd = SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_DX_SET_RENDERTARGETS,
sizeof(SVGA3dCmdDXSetRenderTargets) +
color_count * sizeof(SVGA3dRenderTargetViewId),
surf_count); /* 'surf_count' relocations */
SVGA3dCmdDXSetRenderTargets *cmd =
SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_DX_SET_RENDERTARGETS,
sizeof(SVGA3dCmdDXSetRenderTargets) +
color_count * sizeof(SVGA3dRenderTargetViewId),
surf_count); /* 'surf_count' relocations */
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
@ -347,12 +340,11 @@ SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,
/* Depth / Stencil buffer */
if (depth_stencil_surf) {
ss = svga_surface(depth_stencil_surf);
struct svga_surface *ss = svga_surface(depth_stencil_surf);
view_relocation(swc, depth_stencil_surf, &cmd->depthStencilViewId,
SVGA_RELOC_WRITE);
cmd->depthStencilViewId = ss->view_id;
}
else {
} else {
/* no depth/stencil buffer - still need a relocation */
view_relocation(swc, NULL, &cmd->depthStencilViewId,
SVGA_RELOC_WRITE);
@ -360,14 +352,13 @@ SVGA3D_vgpu10_SetRenderTargets(struct svga_winsys_context *swc,
}
/* Color buffers */
ctarget = (SVGA3dRenderTargetViewId *) &cmd[1];
for (i = 0; i < color_count; i++) {
SVGA3dRenderTargetViewId *ctarget = (SVGA3dRenderTargetViewId *) &cmd[1];
for (unsigned i = 0; i < color_count; i++) {
if (color_surfs[i]) {
ss = svga_surface(color_surfs[i]);
struct svga_surface *ss = svga_surface(color_surfs[i]);
view_relocation(swc, color_surfs[i], ctarget + i, SVGA_RELOC_WRITE);
ctarget[i] = ss->view_id;
}
else {
} else {
view_relocation(swc, NULL, ctarget + i, SVGA_RELOC_WRITE);
ctarget[i] = SVGA3D_INVALID_ID;
}
@ -393,6 +384,7 @@ SVGA3D_vgpu10_SetBlendState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context *swc,
SVGA3dDepthStencilStateId depthStencilId,
@ -406,6 +398,7 @@ SVGA3D_vgpu10_SetDepthStencilState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context *swc,
SVGA3dRasterizerStateId rasterizerId)
@ -418,15 +411,15 @@ SVGA3D_vgpu10_SetRasterizerState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetPredication(struct svga_winsys_context *swc,
SVGA3dQueryId queryId,
uint32 predicateValue)
{
SVGA3dCmdDXSetPredication *cmd;
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_PREDICATION,
sizeof *cmd, 0);
SVGA3dCmdDXSetPredication *cmd =
SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_PREDICATION,
sizeof *cmd, 0);
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
@ -437,35 +430,32 @@ SVGA3D_vgpu10_SetPredication(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context *swc,
unsigned count,
const SVGA3dSoTarget *targets,
struct svga_winsys_surface **surfaces)
{
SVGA3dCmdDXSetSOTargets *cmd;
SVGA3dSoTarget *sot;
unsigned i;
cmd = SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_DX_SET_SOTARGETS,
sizeof(SVGA3dCmdDXSetSOTargets) +
count * sizeof(SVGA3dSoTarget),
count);
SVGA3dCmdDXSetSOTargets *cmd =
SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_DX_SET_SOTARGETS,
sizeof(SVGA3dCmdDXSetSOTargets) +
count * sizeof(SVGA3dSoTarget),
count);
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
cmd->pad0 = 0;
sot = (SVGA3dSoTarget *)(cmd + 1);
for (i = 0; i < count; i++, sot++) {
SVGA3dSoTarget *sot = (SVGA3dSoTarget *)(cmd + 1);
for (unsigned i = 0; i < count; i++, sot++) {
if (surfaces[i]) {
sot->offset = targets[i].offset;
sot->sizeInBytes = targets[i].sizeInBytes;
swc->surface_relocation(swc, &sot->sid, NULL, surfaces[i],
SVGA_RELOC_WRITE);
}
else {
} else {
sot->offset = 0;
sot->sizeInBytes = ~0u;
swc->surface_relocation(swc, &sot->sid, NULL, NULL,
@ -476,18 +466,19 @@ SVGA3D_vgpu10_SetSOTargets(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context *swc,
unsigned count,
const SVGASignedRect *rects)
{
SVGA3dCmdDXSetScissorRects *cmd;
assert(count > 0);
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SCISSORRECTS,
sizeof(SVGA3dCmdDXSetScissorRects) +
count * sizeof(SVGASignedRect),
0);
SVGA3dCmdDXSetScissorRects *cmd =
SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_SET_SCISSORRECTS,
sizeof(SVGA3dCmdDXSetScissorRects) +
count * sizeof(SVGASignedRect),
0);
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
@ -498,6 +489,7 @@ SVGA3D_vgpu10_SetScissorRects(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context *swc,
SVGA3dStreamOutputId soid)
@ -510,6 +502,7 @@ SVGA3D_vgpu10_SetStreamOutput(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_Draw(struct svga_winsys_context *swc,
uint32 vertexCount,
@ -525,6 +518,7 @@ SVGA3D_vgpu10_Draw(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context *swc,
uint32 indexCount,
@ -542,6 +536,7 @@ SVGA3D_vgpu10_DrawIndexed(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context *swc,
uint32 vertexCountPerInstance,
@ -560,6 +555,7 @@ SVGA3D_vgpu10_DrawInstanced(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context *swc,
uint32 indexCountPerInstance,
@ -581,6 +577,7 @@ SVGA3D_vgpu10_DrawIndexedInstanced(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context *swc)
{
@ -593,6 +590,7 @@ SVGA3D_vgpu10_DrawAuto(struct svga_winsys_context *swc)
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context *swc,
SVGA3dQueryId queryId,
@ -607,6 +605,7 @@ SVGA3D_vgpu10_DefineQuery(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context *swc,
SVGA3dQueryId queryId)
@ -619,6 +618,7 @@ SVGA3D_vgpu10_DestroyQuery(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_BindQuery(struct svga_winsys_context *swc,
struct svga_winsys_gb_query *gbQuery,
@ -638,6 +638,7 @@ SVGA3D_vgpu10_BindQuery(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context *swc,
SVGA3dQueryId queryId,
@ -649,6 +650,7 @@ SVGA3D_vgpu10_SetQueryOffset(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context *swc,
SVGA3dQueryId queryId)
@ -659,6 +661,7 @@ SVGA3D_vgpu10_BeginQuery(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_EndQuery(struct svga_winsys_context *swc,
SVGA3dQueryId queryId)
@ -703,6 +706,7 @@ SVGA3D_vgpu10_ClearDepthStencilView(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context *swc,
SVGA3dShaderResourceViewId shaderResourceViewId,
@ -730,6 +734,7 @@ SVGA3D_vgpu10_DefineShaderResourceView(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyShaderResourceView(struct svga_winsys_context *swc,
SVGA3dShaderResourceViewId shaderResourceViewId)
@ -771,6 +776,7 @@ SVGA3D_vgpu10_DefineRenderTargetView(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyRenderTargetView(struct svga_winsys_context *swc,
SVGA3dRenderTargetViewId renderTargetViewId)
@ -816,6 +822,7 @@ SVGA3D_vgpu10_DefineDepthStencilView(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context *swc,
SVGA3dDepthStencilViewId depthStencilViewId)
@ -828,6 +835,7 @@ SVGA3D_vgpu10_DestroyDepthStencilView(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context *swc,
unsigned count,
@ -849,6 +857,7 @@ SVGA3D_vgpu10_DefineElementLayout(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context *swc,
SVGA3dElementLayoutId elementLayoutId)
@ -861,6 +870,7 @@ SVGA3D_vgpu10_DestroyElementLayout(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,
SVGA3dBlendStateId blendId,
@ -868,11 +878,9 @@ SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,
uint8 independentBlendEnable,
const SVGA3dDXBlendStatePerRT *perRT)
{
int i;
SVGA3D_CREATE_COMMAND(DefineBlendState, DEFINE_BLEND_STATE);
for (i = 0; i < SVGA3D_DX_MAX_RENDER_TARGETS; i++) {
for (unsigned i = 0; i < SVGA3D_DX_MAX_RENDER_TARGETS; i++) {
/* At most, one of blend or logicop can be enabled */
assert(perRT[i].blendEnable == 0 || perRT[i].logicOpEnable == 0);
}
@ -887,6 +895,7 @@ SVGA3D_vgpu10_DefineBlendState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context *swc,
SVGA3dBlendStateId blendId)
@ -899,6 +908,7 @@ SVGA3D_vgpu10_DestroyBlendState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context *swc,
SVGA3dDepthStencilStateId depthStencilId,
@ -935,6 +945,7 @@ SVGA3D_vgpu10_DefineDepthStencilState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context *swc,
SVGA3dDepthStencilStateId depthStencilId)
@ -948,6 +959,7 @@ SVGA3D_vgpu10_DestroyDepthStencilState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context *swc,
SVGA3dRasterizerStateId rasterizerId,
@ -985,6 +997,7 @@ SVGA3D_vgpu10_DefineRasterizerState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context *swc,
SVGA3dRasterizerStateId rasterizerId)
@ -997,6 +1010,7 @@ SVGA3D_vgpu10_DestroyRasterizerState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context *swc,
SVGA3dSamplerId samplerId,
@ -1026,6 +1040,7 @@ SVGA3D_vgpu10_DefineSamplerState(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroySamplerState(struct svga_winsys_context *swc,
SVGA3dSamplerId samplerId)
@ -1049,8 +1064,8 @@ SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context *swc,
SVGA3dCmdHeader *header;
SVGA3dCmdDXDefineShader *dcmd;
SVGA3dCmdDXBindShader *bcmd;
unsigned totalSize = 2 * sizeof(*header) +
sizeof(*dcmd) + sizeof(*bcmd);
const unsigned totalSize =
2 * sizeof(*header) + sizeof(*dcmd) + sizeof(*bcmd);
/* Make sure there is room for both commands */
header = swc->reserve(swc, totalSize, 2);
@ -1082,6 +1097,7 @@ SVGA3D_vgpu10_DefineAndBindShader(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context *swc,
SVGA3dShaderId shaderId)
@ -1094,6 +1110,7 @@ SVGA3D_vgpu10_DestroyShader(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,
SVGA3dStreamOutputId soid,
@ -1101,13 +1118,12 @@ SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,
uint32 streamOutputStrideInBytes[SVGA3D_DX_MAX_SOTARGETS],
const SVGA3dStreamOutputDeclarationEntry decl[SVGA3D_MAX_STREAMOUT_DECLS])
{
unsigned i;
SVGA3D_CREATE_COMMAND(DefineStreamOutput, DEFINE_STREAMOUTPUT);
cmd->soid = soid;
cmd->numOutputStreamEntries = numOutputStreamEntries;
for (i = 0; i < ARRAY_SIZE(cmd->streamOutputStrideInBytes); i++)
for (unsigned i = 0; i < ARRAY_SIZE(cmd->streamOutputStrideInBytes); i++)
cmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
memcpy(cmd->decl, decl,
@ -1119,6 +1135,7 @@ SVGA3D_vgpu10_DefineStreamOutput(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context *swc,
SVGA3dStreamOutputId soid)
@ -1131,6 +1148,7 @@ SVGA3D_vgpu10_DestroyStreamOutput(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context *swc,
SVGA3dElementLayoutId elementLayoutId)
@ -1143,6 +1161,7 @@ SVGA3D_vgpu10_SetInputLayout(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
unsigned count,
@ -1152,7 +1171,6 @@ SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
{
SVGA3dCmdDXSetVertexBuffers *cmd;
SVGA3dVertexBuffer *bufs;
unsigned i;
assert(count > 0);
@ -1166,7 +1184,7 @@ SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
cmd->startBuffer = startBuffer;
bufs = (SVGA3dVertexBuffer *) &cmd[1];
for (i = 0; i < count; i++) {
for (unsigned i = 0; i < count; i++) {
bufs[i].stride = bufferInfo[i].stride;
bufs[i].offset = bufferInfo[i].offset;
swc->surface_relocation(swc, &bufs[i].sid, NULL, surfaces[i],
@ -1177,6 +1195,7 @@ SVGA3D_vgpu10_SetVertexBuffers(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetVertexBuffersOffsetAndSize(struct svga_winsys_context *swc,
unsigned count,
@ -1185,7 +1204,6 @@ SVGA3D_vgpu10_SetVertexBuffersOffsetAndSize(struct svga_winsys_context *swc,
{
SVGA3dCmdDXSetVertexBuffersOffsetAndSize *cmd;
SVGA3dVertexBufferOffsetAndSize *bufs;
unsigned i;
assert(count > 0);
@ -1200,7 +1218,7 @@ SVGA3D_vgpu10_SetVertexBuffersOffsetAndSize(struct svga_winsys_context *swc,
cmd->startBuffer = startBuffer;
bufs = (SVGA3dVertexBufferOffsetAndSize *) &cmd[1];
for (i = 0; i < count; i++) {
for (unsigned i = 0; i < count; i++) {
bufs[i].stride = bufferInfo[i].stride;
bufs[i].offset = bufferInfo[i].offset;
bufs[i].sizeInBytes = bufferInfo[i].sizeInBytes;
@ -1210,6 +1228,7 @@ SVGA3D_vgpu10_SetVertexBuffersOffsetAndSize(struct svga_winsys_context *swc,
return PIPE_OK;
}
enum pipe_error
SVGA3D_vgpu10_SetTopology(struct svga_winsys_context *swc,
SVGA3dPrimitiveType topology)
@ -1443,7 +1462,7 @@ SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc,
SVGA3dBox *dstBox)
{
SVGA3dCmdDXTransferFromBuffer *cmd;
cmd = SVGA3D_FIFOReserve(swc, SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
sizeof(SVGA3dCmdDXTransferFromBuffer), 2);
@ -1457,7 +1476,7 @@ SVGA3D_vgpu10_TransferFromBuffer(struct svga_winsys_context *swc,
cmd->srcSlicePitch = srcSlicePitch;
cmd->destSubResource = dstSubResource;
cmd->destBox = *dstBox;
swc->commit(swc);
return PIPE_OK;
}
@ -1608,7 +1627,6 @@ SVGA3D_sm5_SetUAViews(struct svga_winsys_context *swc,
{
SVGA3dCmdDXSetUAViews *cmd;
SVGA3dUAViewId *cmd_uavIds;
unsigned i;
cmd = SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_DX_SET_UA_VIEWS,
@ -1621,7 +1639,7 @@ SVGA3D_sm5_SetUAViews(struct svga_winsys_context *swc,
cmd->uavSpliceIndex = uavSpliceIndex;
cmd_uavIds = (SVGA3dUAViewId *) (cmd + 1);
for (i = 0; i < count; i++, cmd_uavIds++) {
for (unsigned i = 0; i < count; i++, cmd_uavIds++) {
swc->surface_relocation(swc, cmd_uavIds, NULL,
uaViews[i],
SVGA_RELOC_READ | SVGA_RELOC_WRITE);
@ -1686,7 +1704,6 @@ SVGA3D_sm5_SetCSUAViews(struct svga_winsys_context *swc,
{
SVGA3dCmdDXSetCSUAViews *cmd;
SVGA3dUAViewId *cmd_uavIds;
unsigned i;
cmd = SVGA3D_FIFOReserve(swc,
SVGA_3D_CMD_DX_SET_CS_UA_VIEWS,
@ -1699,7 +1716,7 @@ SVGA3D_sm5_SetCSUAViews(struct svga_winsys_context *swc,
cmd->startIndex = 0;
cmd_uavIds = (SVGA3dUAViewId *) (cmd + 1);
for (i = 0; i < count; i++, cmd_uavIds++) {
for (unsigned i = 0; i < count; i++, cmd_uavIds++) {
swc->surface_relocation(swc, cmd_uavIds, NULL,
uaViews[i],
SVGA_RELOC_READ | SVGA_RELOC_WRITE);
@ -1727,7 +1744,6 @@ SVGA3D_sm5_DefineAndBindStreamOutput(struct svga_winsys_context *swc,
uint32 rasterizedStream,
uint32 sizeInBytes)
{
unsigned i;
SVGA3dCmdHeader *header;
SVGA3dCmdDXDefineStreamOutputWithMob *dcmd;
SVGA3dCmdDXBindStreamOutput *bcmd;
@ -1749,7 +1765,7 @@ SVGA3D_sm5_DefineAndBindStreamOutput(struct svga_winsys_context *swc,
dcmd->numOutputStreamStrides = numOutputStreamStrides;
dcmd->rasterizedStream = rasterizedStream;
for (i = 0; i < ARRAY_SIZE(dcmd->streamOutputStrideInBytes); i++)
for (unsigned i = 0; i < ARRAY_SIZE(dcmd->streamOutputStrideInBytes); i++)
dcmd->streamOutputStrideInBytes[i] = streamOutputStrideInBytes[i];
@ -1831,7 +1847,7 @@ SVGA3D_DefineGBSurface_v2(struct svga_winsys_context *swc,
sizeof(*cmd),
0);
if(!cmd)
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
cmd->sid = sid;
@ -1867,7 +1883,7 @@ SVGA3D_DefineGBSurface_v3(struct svga_winsys_context *swc,
sizeof(*cmd),
0);
if(!cmd)
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
cmd->sid = sid;
@ -1906,7 +1922,7 @@ SVGA3D_DefineGBSurface_v4(struct svga_winsys_context *swc,
sizeof(*cmd),
0);
if(!cmd)
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
cmd->sid = sid;
@ -1936,7 +1952,7 @@ SVGA3D_DestroyGBSurface(struct svga_winsys_context *swc,
sizeof(*cmd),
0);
if(!cmd)
if (!cmd)
return PIPE_ERROR_OUT_OF_MEMORY;
cmd->sid = sid;

2
src/gallium/drivers/svga/svga_context.h
View file

@ -1035,7 +1035,7 @@ svga_set_curr_shader_use_samplers_flag(struct svga_context *svga,
static inline bool
svga_curr_shader_use_samplers(const struct svga_context *svga,
enum pipe_shader_type shader_type)
enum pipe_shader_type shader_type)
{
return svga->curr.use_samplers[shader_type];
}

13
src/gallium/drivers/svga/svga_debug.h
View file

@ -41,16 +41,15 @@ extern int SVGA_DEBUG;
#endif
static inline void
SVGA_DBG( unsigned flag, const char *fmt, ... )
SVGA_DBG(unsigned flag, const char *fmt, ...)
{
#if MESA_DEBUG
if (SVGA_DEBUG & flag)
{
#if MESA_DEBUG
if (SVGA_DEBUG & flag) {
va_list args;
va_start( args, fmt );
debug_vprintf( fmt, args );
va_end( args );
va_start(args, fmt);
debug_vprintf(fmt, args);
va_end(args);
}
#else
(void)flag;

119
src/gallium/drivers/svga/svga_format.c
View file

@ -212,6 +212,7 @@ svga_format_entry(enum pipe_format format)
return &format_conversion_table[format];
}
/**
* Translate a gallium vertex format to a vgpu10 vertex format.
* Also, return any special vertex format flags.
@ -282,17 +283,14 @@ svga_translate_format(const struct svga_screen *ss,
if (ss->sws->have_vgpu10) {
if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) {
return entry->vertex_format;
}
else if (bind & PIPE_BIND_SCANOUT) {
} else if (bind & PIPE_BIND_SCANOUT) {
return svga_translate_screen_target_format_vgpu10(format);
}
else if (bind & PIPE_BIND_SHADER_IMAGE) {
} else if (bind & PIPE_BIND_SHADER_IMAGE) {
if (format_conversion_table[format].flags & TF_UAV)
return format_conversion_table[format].pixel_format;
else
return SVGA3D_FORMAT_INVALID;
}
else {
} else {
if ((format_conversion_table[format].flags & TF_SM5) &&
!ss->sws->have_sm5)
return SVGA3D_FORMAT_INVALID;
@ -301,7 +299,7 @@ svga_translate_format(const struct svga_screen *ss,
}
}
switch(format) {
switch (format) {
case PIPE_FORMAT_B8G8R8A8_UNORM:
return SVGA3D_A8R8G8B8;
case PIPE_FORMAT_B8G8R8X8_UNORM:
@ -1356,68 +1354,68 @@ static const struct format_cap format_cap_table[] = {
},
{
"SVGA3D_BC4_UNORM",
SVGA3D_BC4_UNORM,
SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
4, 4, 8, 0
SVGA3D_BC4_UNORM,
SVGA3D_DEVCAP_DXFMT_BC4_UNORM,
4, 4, 8, 0
},
{
"SVGA3D_BC5_UNORM",
SVGA3D_BC5_UNORM,
SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
4, 4, 16, 0
SVGA3D_BC5_UNORM,
SVGA3D_DEVCAP_DXFMT_BC5_UNORM,
4, 4, 16, 0
},
{
"SVGA3D_B4G4R4A4_UNORM",
SVGA3D_B4G4R4A4_UNORM,
SVGA3D_B4G4R4A4_UNORM,
0, 0, 0, 0
},
{
"SVGA3D_BC6H_TYPELESS",
SVGA3D_BC6H_TYPELESS,
SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
4, 4, 16, 0
SVGA3D_BC6H_TYPELESS,
SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
4, 4, 16, 0
},
{
"SVGA3D_BC6H_UF16",
SVGA3D_BC6H_UF16,
SVGA3D_DEVCAP_DXFMT_BC6H_UF16,
4, 4, 16, 0
SVGA3D_BC6H_UF16,
SVGA3D_DEVCAP_DXFMT_BC6H_UF16,
4, 4, 16, 0
},
{
"SVGA3D_BC6H_SF16",
SVGA3D_BC6H_SF16,
SVGA3D_DEVCAP_DXFMT_BC6H_SF16,
4, 4, 16, 0
SVGA3D_BC6H_SF16,
SVGA3D_DEVCAP_DXFMT_BC6H_SF16,
4, 4, 16, 0
},
{
"SVGA3D_BC7_TYPELESS",
SVGA3D_BC7_TYPELESS,
SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS,
4, 4, 16, 0
SVGA3D_BC7_TYPELESS,
SVGA3D_DEVCAP_DXFMT_BC7_TYPELESS,
4, 4, 16, 0
},
{
"SVGA3D_BC7_UNORM",
SVGA3D_BC7_UNORM,
SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
4, 4, 16, 0
SVGA3D_BC7_UNORM,
SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
4, 4, 16, 0
},
{
"SVGA3D_BC7_UNORM_SRGB",
SVGA3D_BC7_UNORM_SRGB,
SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
4, 4, 16, 0
SVGA3D_BC7_UNORM_SRGB,
SVGA3D_DEVCAP_DXFMT_BC6H_TYPELESS,
4, 4, 16, 0
},
{
"SVGA3D_AYUV",
SVGA3D_AYUV,
0,
1, 1, 4, 0
SVGA3D_AYUV,
0,
1, 1, 4, 0
},
{
"SVGA3D_R11G11B10_TYPELESS",
SVGA3D_R11G11B10_TYPELESS,
SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1, 1, 4, 0
SVGA3D_R11G11B10_TYPELESS,
SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT,
1, 1, 4, 0
}
};
@ -1458,10 +1456,8 @@ check_format_tables(void)
static bool first_call = true;
if (first_call) {
unsigned i;
STATIC_ASSERT(ARRAY_SIZE(format_cap_table) == SVGA3D_FORMAT_MAX);
for (i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
for (unsigned i = 0; i < ARRAY_SIZE(format_cap_table); i++) {
assert(format_cap_table[i].format == i);
}
@ -1723,8 +1719,7 @@ svga_get_dx_format_cap(struct svga_screen *ss,
format == SVGA3D_R24_UNORM_X8)) {
caps->u |= SVGA3D_DXFMT_SHADER_SAMPLE;
}
}
else {
} else {
caps->u = entry->defaultOperations;
}
@ -1824,22 +1819,17 @@ svga_get_texture_datatype(enum pipe_format format)
if (desc->layout == UTIL_FORMAT_LAYOUT_PLAIN ) {
if (util_format_is_depth_or_stencil(format)) {
t = TGSI_RETURN_TYPE_FLOAT; /* XXX revisit this */
}
else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
} else if (desc->channel[0].type == UTIL_FORMAT_TYPE_FLOAT) {
t = TGSI_RETURN_TYPE_FLOAT;
}
else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
} else if (desc->channel[0].type == UTIL_FORMAT_TYPE_UNSIGNED) {
t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_UNORM : TGSI_RETURN_TYPE_UINT;
}
else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
} else if (desc->channel[0].type == UTIL_FORMAT_TYPE_SIGNED) {
t = desc->channel[0].normalized ? TGSI_RETURN_TYPE_SNORM : TGSI_RETURN_TYPE_SINT;
}
else {
} else {
assert(!"Unexpected channel type in svga_get_texture_datatype()");
t = TGSI_RETURN_TYPE_FLOAT;
}
}
else {
} else {
/* compressed format, shared exponent format, etc. */
switch (format) {
case PIPE_FORMAT_DXT1_RGB:
@ -1885,8 +1875,7 @@ svga_get_texture_datatype(enum pipe_format format)
bool
svga_has_any_integer_cbufs(const struct svga_context *svga)
{
unsigned i;
for (i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
for (unsigned i = 0; i < PIPE_MAX_COLOR_BUFS; ++i) {
const struct svga_surface *cbuf = svga->curr.framebuffer.cbufs[i];
if (cbuf && cbuf->base.texture && util_format_is_pure_integer(cbuf->base.format)) {
@ -2128,14 +2117,13 @@ svga_format_is_shareable(const struct svga_screen *ss,
{
SVGA3dSurfaceFormat default_format =
svga_translate_format(ss, pformat, bind);
int i;
if (default_format == SVGA3D_FORMAT_INVALID)
return false;
if (default_format == sformat)
return true;
for (i = 0; i < ARRAY_SIZE(format_compats); ++i) {
for (unsigned i = 0; i < ARRAY_SIZE(format_compats); ++i) {
if (format_compats[i].pformat == pformat) {
const SVGA3dSurfaceFormat *compat_format =
format_compats[i].compat_format;
@ -2197,9 +2185,6 @@ svga_is_format_supported(struct pipe_screen *screen,
unsigned bindings)
{
struct svga_screen *ss = svga_screen(screen);
SVGA3dSurfaceFormat svga_format;
SVGA3dSurfaceFormatCaps caps;
SVGA3dSurfaceFormatCaps mask;
assert(bindings);
assert(!ss->sws->have_vgpu10);
@ -2208,7 +2193,8 @@ svga_is_format_supported(struct pipe_screen *screen,
if (sample_count > 1)
return false;
svga_format = svga_translate_format(ss, format, bindings);
const SVGA3dSurfaceFormat svga_format =
svga_translate_format(ss, format, bindings);
if (svga_format == SVGA3D_FORMAT_INVALID) {
return false;
}
@ -2254,6 +2240,7 @@ svga_is_format_supported(struct pipe_screen *screen,
/*
* Query the host capabilities.
*/
SVGA3dSurfaceFormatCaps caps;
svga_get_format_cap(ss, svga_format, &caps);
if (bindings & PIPE_BIND_RENDER_TARGET) {
@ -2266,6 +2253,7 @@ svga_is_format_supported(struct pipe_screen *screen,
}
}
SVGA3dSurfaceFormatCaps mask;
mask.value = 0;
if (bindings & PIPE_BIND_RENDER_TARGET)
mask.value |= SVGA3DFORMAT_OP_OFFSCREEN_RENDERTARGET;
@ -2298,8 +2286,6 @@ svga_is_dx_format_supported(struct pipe_screen *screen,
unsigned bindings)
{
struct svga_screen *ss = svga_screen(screen);
SVGA3dSurfaceFormat svga_format;
SVGA3dDevCapResult caps;
unsigned int mask = 0;
assert(bindings);
@ -2310,7 +2296,6 @@ svga_is_dx_format_supported(struct pipe_screen *screen,
return (ss->sws->have_gl43 && (sample_count <= ss->forcedSampleCount));
if (sample_count > 1) {
/* No MSAA support for shader image */
if (bindings & PIPE_BIND_SHADER_IMAGE)
return false;
@ -2329,18 +2314,21 @@ svga_is_dx_format_supported(struct pipe_screen *screen,
*/
if (bindings & PIPE_BIND_VERTEX_BUFFER) {
SVGA3dSurfaceFormat svga_format;
unsigned flags;
svga_translate_vertex_format_vgpu10(format, &svga_format, &flags);
return svga_format != SVGA3D_FORMAT_INVALID;
}
if (bindings & PIPE_BIND_SAMPLER_VIEW && target == PIPE_BUFFER) {
SVGA3dSurfaceFormat svga_format;
unsigned flags;
svga_translate_texture_buffer_view_format(format, &svga_format, &flags);
return svga_format != SVGA3D_FORMAT_INVALID;
}
svga_format = svga_translate_format(ss, format, bindings);
const SVGA3dSurfaceFormat svga_format =
svga_translate_format(ss, format, bindings);
if (svga_format == SVGA3D_FORMAT_INVALID) {
return false;
}
@ -2380,6 +2368,7 @@ svga_is_dx_format_supported(struct pipe_screen *screen,
/*
* Query the host capabilities.
*/
SVGA3dDevCapResult caps;
svga_get_dx_format_cap(ss, svga_format, &caps);
if (bindings & PIPE_BIND_RENDER_TARGET) {

28
src/gallium/drivers/svga/svga_pipe_blend.c
View file

@ -57,6 +57,7 @@ svga_translate_blend_factor(const struct svga_context *svga, unsigned factor)
}
}
static inline unsigned
svga_translate_blend_func(unsigned mode)
{
@ -277,8 +278,7 @@ svga_create_blend_state(struct pipe_context *pipe,
{
struct svga_context *svga = svga_context(pipe);
struct svga_screen *ss = svga_screen(pipe->screen);
struct svga_blend_state *blend = CALLOC_STRUCT( svga_blend_state );
unsigned i;
struct svga_blend_state *blend = CALLOC_STRUCT(svga_blend_state);
if (!blend)
return NULL;
@ -287,7 +287,7 @@ svga_create_blend_state(struct pipe_context *pipe,
* enabled at all, first_enabled will be zero.
*/
unsigned first_enabled = 0;
for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
for (unsigned i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
if (templ->rt[i].blend_enable) {
first_enabled = i;
break;
@ -297,7 +297,7 @@ svga_create_blend_state(struct pipe_context *pipe,
/* Fill in the per-rendertarget blend state. We currently only
* support independent blend enable and colormask per render target.
*/
for (i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
for (unsigned i = 0; i < PIPE_MAX_COLOR_BUFS; i++) {
/* No way to set this in SVGA3D, and no way to correctly implement it on
* top of D3D9 API. Instead we try to simulate with various blend modes.
*/
@ -404,8 +404,9 @@ svga_create_blend_state(struct pipe_context *pipe,
}
static void svga_bind_blend_state(struct pipe_context *pipe,
void *blend)
static void
svga_bind_blend_state(struct pipe_context *pipe,
void *blend)
{
struct svga_context *svga = svga_context(pipe);
@ -413,8 +414,10 @@ static void svga_bind_blend_state(struct pipe_context *pipe,
svga->dirty |= SVGA_NEW_BLEND;
}
static void svga_delete_blend_state(struct pipe_context *pipe,
void *blend)
static void
svga_delete_blend_state(struct pipe_context *pipe,
void *blend)
{
struct svga_context *svga = svga_context(pipe);
struct svga_blend_state *bs =
@ -434,8 +437,10 @@ static void svga_delete_blend_state(struct pipe_context *pipe,
svga->hud.num_blend_objects--;
}
static void svga_set_blend_color( struct pipe_context *pipe,
const struct pipe_blend_color *blend_color )
static void
svga_set_blend_color(struct pipe_context *pipe,
const struct pipe_blend_color *blend_color)
{
struct svga_context *svga = svga_context(pipe);
@ -445,7 +450,8 @@ static void svga_set_blend_color( struct pipe_context *pipe,
}
void svga_init_blend_functions( struct svga_context *svga )
void
svga_init_blend_functions(struct svga_context *svga)
{
svga->pipe.create_blend_state = svga_create_blend_state;
svga->pipe.bind_blend_state = svga_bind_blend_state;

7
src/gallium/drivers/svga/svga_pipe_blit.c
View file

@ -14,7 +14,6 @@
#include "svga_surface.h"
#include "svga_resource_buffer_upload.h"
//#include "util/u_blit_sw.h"
#include "util/format/u_format.h"
#include "util/u_surface.h"
@ -131,7 +130,7 @@ copy_region_vgpu10(struct svga_context *svga, struct pipe_resource *src_tex,
* Fallback to the copy region utility which uses map/memcpy for the copy
*/
static void
copy_region_fallback(struct svga_context *svga,
copy_region_fallback(struct svga_context *svga,
struct pipe_resource *dst_tex, unsigned dst_level,
unsigned dstx, unsigned dsty, unsigned dstz,
struct pipe_resource *src_tex, unsigned src_level,
@ -819,7 +818,7 @@ is_texture_valid_to_copy(struct svga_context *svga,
}
return (bufsurf &&
bufsurf->surface_state >= SVGA_SURFACE_STATE_UPDATED);
bufsurf->surface_state >= SVGA_SURFACE_STATE_UPDATED);
} else {
struct svga_texture *tex = svga_texture(resource);
return ((tex->surface_state >= SVGA_SURFACE_STATE_UPDATED) ||
@ -871,7 +870,7 @@ svga_blit(struct pipe_context *pipe,
if (!try_cpu_copy_region(svga, blit))
debug_printf("svga: Blit failed.\n");
done:
SVGA_STATS_TIME_POP(sws); /* SVGA_STATS_TIME_BLIT */
(void) sws;

80
src/gallium/drivers/svga/svga_pipe_clear.c
View file

@ -164,8 +164,7 @@ try_clear(struct svga_context *svga,
clear_buffers_with_quad(svga, buffers, color, depth, stencil);
/* We also cleared depth/stencil, so that's done */
flags &= ~(SVGA3D_CLEAR_DEPTH | SVGA3D_CLEAR_STENCIL);
}
else {
} else {
struct pipe_surface *rtv;
float rgba[4];
@ -174,8 +173,7 @@ try_clear(struct svga_context *svga,
rgba[1] = (float) color->i[1];
rgba[2] = (float) color->i[2];
rgba[3] = (float) color->i[3];
}
else {
} else {
rgba[0] = color->f[0];
rgba[1] = color->f[1];
rgba[2] = color->f[2];
@ -210,8 +208,7 @@ try_clear(struct svga_context *svga,
if (ret != PIPE_OK)
return ret;
}
}
else {
} else {
ret = SVGA3D_ClearRect(svga->swc, flags, uc.ui[0], (float) depth, stencil,
rect.x, rect.y, rect.w, rect.h);
if (ret != PIPE_OK)
@ -221,7 +218,7 @@ try_clear(struct svga_context *svga,
if (restore_viewport) {
ret = SVGA3D_SetViewport(svga->swc, &svga->state.hw_clear.viewport);
}
return ret;
}
@ -230,11 +227,13 @@ try_clear(struct svga_context *svga,
* No masking, no scissor (clear entire buffer).
*/
static void
svga_clear(struct pipe_context *pipe, unsigned buffers, const struct pipe_scissor_state *scissor_state,
svga_clear(struct pipe_context *pipe,
unsigned buffers,
const struct pipe_scissor_state *scissor_state,
const union pipe_color_union *color,
double depth, unsigned stencil)
double depth, unsigned stencil)
{
struct svga_context *svga = svga_context( pipe );
struct svga_context *svga = svga_context(pipe);
enum pipe_error ret;
if (buffers & PIPE_CLEAR_COLOR) {
@ -248,7 +247,7 @@ svga_clear(struct pipe_context *pipe, unsigned buffers, const struct pipe_scisso
/* flush any queued prims (don't want them to appear after the clear!) */
svga_hwtnl_flush_retry(svga);
SVGA_RETRY_OOM(svga, ret, try_clear( svga, buffers, color, depth, stencil));
SVGA_RETRY_OOM(svga, ret, try_clear(svga, buffers, color, depth, stencil));
/*
* Mark target surfaces as dirty
@ -298,8 +297,7 @@ svga_clear_texture(struct pipe_context *pipe,
if (data == NULL) {
depth = 0.0;
stencil = 0;
}
else {
} else {
util_format_unpack_z_float(surface->format, &depth, data, 1);
util_format_unpack_s_8uint(surface->format, &stencil, data, 1);
}
@ -329,8 +327,7 @@ svga_clear_texture(struct pipe_context *pipe,
SVGA_RETRY(svga, SVGA3D_vgpu10_ClearDepthStencilView(svga->swc, dsv,
clear_flags,
stencil, depth));
}
else {
} else {
/* To clear subtexture use software fallback */
util_blitter_save_framebuffer(svga->blitter,
@ -342,15 +339,13 @@ svga_clear_texture(struct pipe_context *pipe,
box->x, box->y,
box->width, box->height);
}
}
else {
} else {
/* non depth-stencil formats */
if (data == NULL) {
/* If data is NULL, the texture image is filled with zeros */
color.f[0] = color.f[1] = color.f[2] = color.f[3] = 0;
}
else {
} else {
util_format_unpack_rgba(surface->format, &color, data, 1);
}
@ -371,8 +366,7 @@ svga_clear_texture(struct pipe_context *pipe,
if (int_target && !ints_fit_in_floats(&color)) {
/* To clear full texture with integer format */
clear_buffers_with_quad(svga, PIPE_CLEAR_COLOR, &color, 0.0, 0);
}
else {
} else {
float rgba[4];
if (int_target) {
@ -380,8 +374,7 @@ svga_clear_texture(struct pipe_context *pipe,
rgba[1] = (float) color.i[1];
rgba[2] = (float) color.i[2];
rgba[3] = (float) color.i[3];
}
else {
} else {
rgba[0] = color.f[0];
rgba[1] = color.f[1];
rgba[2] = color.f[2];
@ -393,8 +386,7 @@ svga_clear_texture(struct pipe_context *pipe,
SVGA_RETRY(svga, SVGA3D_vgpu10_ClearRenderTargetView(svga->swc, rtv,
rgba));
}
}
else {
} else {
/* To clear subtexture use software fallback */
/**
@ -417,8 +409,7 @@ svga_clear_texture(struct pipe_context *pipe,
&color,
box->x, box->y,
box->width, box->height);
}
else {
} else {
/* clear with map/write/unmap */
/* store layer values */
@ -441,6 +432,7 @@ svga_clear_texture(struct pipe_context *pipe,
pipe_surface_reference(&surface, NULL);
}
/**
* \brief Clear the whole render target using vgpu10 functionality
*
@ -463,7 +455,8 @@ svga_try_clear_render_target(struct svga_context *svga,
assert(svga_surface(rtv)->view_id != SVGA3D_INVALID_ID);
return SVGA3D_vgpu10_ClearRenderTargetView(svga->swc, rtv, color->f);
}
}
/**
* \brief Clear part of render target using gallium blitter utilities
@ -512,24 +505,27 @@ svga_clear_render_target(struct pipe_context *pipe,
unsigned dst_width, unsigned dst_height,
bool render_condition_enabled)
{
struct svga_context *svga = svga_context( pipe );
struct svga_context *svga = svga_context(pipe);
svga_toggle_render_condition(svga, render_condition_enabled, false);
if (!svga_have_vgpu10(svga) || dstx != 0 || dsty != 0 ||
dst_width != pipe_surface_width(dst) || dst_height != pipe_surface_height(dst)) {
svga_blitter_clear_render_target(svga, dst, color, dstx, dsty, dst_width,
dst_height);
} else {
enum pipe_error ret;
svga_toggle_render_condition(svga, render_condition_enabled, false);
if (!svga_have_vgpu10(svga) || dstx != 0 || dsty != 0 ||
dst_width != pipe_surface_width(dst) ||
dst_height != pipe_surface_height(dst)) {
svga_blitter_clear_render_target(svga, dst, color, dstx, dsty, dst_width,
dst_height);
} else {
enum pipe_error ret;
SVGA_RETRY_OOM(svga, ret, svga_try_clear_render_target(svga, dst,
color));
assert (ret == PIPE_OK);
}
svga_toggle_render_condition(svga, render_condition_enabled, true);
SVGA_RETRY_OOM(svga, ret, svga_try_clear_render_target(svga, dst,
color));
assert (ret == PIPE_OK);
}
svga_toggle_render_condition(svga, render_condition_enabled, true);
}
void svga_init_clear_functions(struct svga_context *svga)
void
svga_init_clear_functions(struct svga_context *svga)
{
svga->pipe.clear_render_target = svga_clear_render_target;
svga->pipe.clear_texture = svga_have_vgpu10(svga) ? svga_clear_texture : NULL;

2
src/gallium/drivers/svga/svga_pipe_depthstencil.c
View file

@ -102,7 +102,7 @@ define_depth_stencil_state_object(struct svga_context *svga,
static void *
svga_create_depth_stencil_state(struct pipe_context *pipe,
const struct pipe_depth_stencil_alpha_state *templ)
const struct pipe_depth_stencil_alpha_state *templ)
{
struct svga_context *svga = svga_context(pipe);
struct svga_depth_stencil_state *ds = CALLOC_STRUCT(svga_depth_stencil_state);

12
src/gallium/drivers/svga/svga_pipe_flush.c
View file

@ -14,15 +14,16 @@
#include "svga_debug.h"
static void svga_flush( struct pipe_context *pipe,
struct pipe_fence_handle **fence,
unsigned flags)
static void
svga_flush(struct pipe_context *pipe,
struct pipe_fence_handle **fence,
unsigned flags)
{
struct svga_context *svga = svga_context(pipe);
/* Emit buffered drawing commands, and any back copies.
*/
svga_surfaces_flush( svga );
svga_surfaces_flush(svga);
if (flags & PIPE_FLUSH_FENCE_FD)
svga->swc->hints |= SVGA_HINT_FLAG_EXPORT_FENCE_FD;
@ -94,7 +95,8 @@ svga_fence_server_sync(struct pipe_context *pipe,
}
void svga_init_flush_functions( struct svga_context *svga )
void
svga_init_flush_functions(struct svga_context *svga)
{
svga->pipe.flush = svga_flush;
svga->pipe.create_fence_fd = svga_create_fence_fd;

27
src/gallium/drivers/svga/svga_pipe_sampler.c
View file

@ -168,8 +168,7 @@ define_sampler_state_object(struct svga_context *svga,
if (ps->min_mip_filter == PIPE_TEX_MIPFILTER_NONE) {
/* just use the base level image */
min_lod = max_lod = 0.0f;
}
else {
} else {
min_lod = ps->min_lod;
max_lod = ps->max_lod;
}
@ -183,8 +182,7 @@ define_sampler_state_object(struct svga_context *svga,
STATIC_ASSERT(PIPE_TEX_COMPARE_R_TO_TEXTURE == 1);
ss->id[1] = SVGA3D_INVALID_ID;
unsigned i;
for (i = 0; i <= ss->compare_mode; i++) {
for (unsigned i = 0; i <= ss->compare_mode; i++) {
ss->id[i] = util_bitmask_add(svga->sampler_object_id_bm);
SVGA_RETRY(svga, SVGA3D_vgpu10_DefineSamplerState
@ -212,15 +210,15 @@ svga_create_sampler_state(struct pipe_context *pipe,
const struct pipe_sampler_state *sampler)
{
struct svga_context *svga = svga_context(pipe);
struct svga_sampler_state *cso = CALLOC_STRUCT( svga_sampler_state );
struct svga_sampler_state *cso = CALLOC_STRUCT(svga_sampler_state);
if (!cso)
return NULL;
cso->mipfilter = translate_mip_filter(sampler->min_mip_filter);
cso->magfilter = translate_img_filter( sampler->mag_img_filter );
cso->minfilter = translate_img_filter( sampler->min_img_filter );
cso->aniso_level = MAX2( sampler->max_anisotropy, 1 );
cso->magfilter = translate_img_filter(sampler->mag_img_filter);
cso->minfilter = translate_img_filter(sampler->min_img_filter);
cso->aniso_level = MAX2(sampler->max_anisotropy, 1);
if (sampler->max_anisotropy)
cso->magfilter = cso->minfilter = SVGA3D_TEX_FILTER_ANISOTROPIC;
cso->lod_bias = sampler->lod_bias;
@ -282,7 +280,6 @@ svga_bind_sampler_states(struct pipe_context *pipe,
void **samplers)
{
struct svga_context *svga = svga_context(pipe);
unsigned i;
bool any_change = false;
assert(shader < PIPE_SHADER_TYPES);
@ -292,7 +289,7 @@ svga_bind_sampler_states(struct pipe_context *pipe,
if (!svga_have_vgpu10(svga) && shader != PIPE_SHADER_FRAGMENT)
return;
for (i = 0; i < num; i++) {
for (unsigned i = 0; i < num; i++) {
if (svga->curr.sampler[shader][start + i] != samplers[i])
any_change = true;
svga->curr.sampler[shader][start + i] = samplers[i];
@ -401,7 +398,6 @@ svga_set_sampler_views(struct pipe_context *pipe,
struct svga_context *svga = svga_context(pipe);
unsigned flag_1d = 0;
unsigned flag_srgb = 0;
uint i;
bool any_change = false;
assert(shader < PIPE_SHADER_TYPES);
@ -424,13 +420,14 @@ svga_set_sampler_views(struct pipe_context *pipe,
* differently than other shader types.
*/
if (start == 0 && num == 0 && svga->curr.num_sampler_views[shader] > 0) {
for (i = 0; i < svga->curr.num_sampler_views[shader]; i++) {
for (unsigned i = 0; i < svga->curr.num_sampler_views[shader]; i++) {
pipe_sampler_view_reference(&svga->curr.sampler_views[shader][i],
NULL);
}
any_change = true;
}
unsigned i;
for (i = 0; i < num; i++) {
enum pipe_texture_target target;
@ -505,6 +502,7 @@ done:
SVGA_STATS_TIME_POP(svga_sws(svga));
}
/**
* Clean up sampler, sampler view state at context destruction time
*/
@ -521,7 +519,7 @@ svga_cleanup_sampler_state(struct svga_context *svga)
NULL);
}
}
/* free polygon stipple state */
if (svga->polygon_stipple.sampler) {
svga->pipe.delete_sampler_state(&svga->pipe, svga->polygon_stipple.sampler);
@ -534,8 +532,9 @@ svga_cleanup_sampler_state(struct svga_context *svga)
pipe_resource_reference(&svga->polygon_stipple.texture, NULL);
}
void
svga_init_sampler_functions( struct svga_context *svga )
svga_init_sampler_functions(struct svga_context *svga)
{
svga->pipe.create_sampler_state = svga_create_sampler_state;
svga->pipe.bind_sampler_states = svga_bind_sampler_states;

4
src/gallium/drivers/svga/svga_pipe_streamout.c
View file

@ -583,7 +583,7 @@ svga_begin_stream_output_queries(struct svga_context *svga,
ret = svga->pipe.begin_query(&svga->pipe, svga->so_queries[i]);
}
(void) ret;
}
}
svga->in_streamout = true;
return;
@ -608,7 +608,7 @@ svga_end_stream_output_queries(struct svga_context *svga,
ret = svga->pipe.end_query(&svga->pipe, svga->so_queries[i]);
}
(void) ret;
}
}
svga->in_streamout = false;
return;

2
src/gallium/drivers/svga/svga_resource.c
View file

@ -111,7 +111,7 @@ svga_can_create_resource(struct pipe_screen *screen,
numSamples = res->nr_samples;
}
return sws->surface_can_create(sws, format, base_level_size,
return sws->surface_can_create(sws, format, base_level_size,
arraySize, numMipLevels, numSamples);
}

35
src/gallium/drivers/svga/svga_resource_buffer_upload.c
View file

@ -42,10 +42,10 @@ svga_buffer_upload_ranges(struct svga_context *, struct svga_buffer *);
* to avoid recursion.
*/
struct svga_winsys_buffer *
svga_winsys_buffer_create( struct svga_context *svga,
unsigned alignment,
unsigned usage,
unsigned size )
svga_winsys_buffer_create(struct svga_context *svga,
unsigned alignment,
unsigned usage,
unsigned size)
{
struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
struct svga_winsys_screen *sws = svgascreen->sws;
@ -198,7 +198,7 @@ svga_buffer_create_host_surface(struct svga_screen *ss,
* surface cannot have other bind flags.
*/
if ((bind_flags & PIPE_BIND_CONSTANT_BUFFER) == 0) {
sbuf->key.flags |= SVGA3D_SURFACE_BIND_UAVIEW |
sbuf->key.flags |= SVGA3D_SURFACE_BIND_UAVIEW |
SVGA3D_SURFACE_BIND_RAW_VIEWS;
bind_flags = bind_flags | PIPE_BIND_SHADER_BUFFER;
//sbuf->key.flags |= SVGA3D_SURFACE_BIND_RAW_VIEWS;
@ -238,14 +238,14 @@ svga_buffer_create_host_surface(struct svga_screen *ss,
/* Add the new surface to the buffer surface list */
sbuf->bufsurf = svga_buffer_add_host_surface(sbuf, sbuf->handle,
&sbuf->key,
&sbuf->key,
bind_flags);
if (sbuf->bufsurf == NULL)
return PIPE_ERROR_OUT_OF_MEMORY;
sbuf->bufsurf->surface_state =
invalidated ? SVGA_SURFACE_STATE_INVALIDATED :
SVGA_SURFACE_STATE_CREATED;
invalidated ? SVGA_SURFACE_STATE_INVALIDATED :
SVGA_SURFACE_STATE_CREATED;
if (ss->sws->have_gb_objects) {
/* Initialize the surface with zero */
@ -584,12 +584,10 @@ svga_buffer_upload_hb_command(struct svga_context *svga,
if (transfer == SVGA3D_WRITE_HOST_VRAM) {
region_flags = SVGA_RELOC_READ;
surface_flags = SVGA_RELOC_WRITE;
}
else if (transfer == SVGA3D_READ_HOST_VRAM) {
} else if (transfer == SVGA3D_READ_HOST_VRAM) {
region_flags = SVGA_RELOC_WRITE;
surface_flags = SVGA_RELOC_READ;
}
else {
} else {
assert(0);
return PIPE_ERROR_BAD_INPUT;
}
@ -696,8 +694,7 @@ svga_buffer_upload_flush(struct svga_context *svga, struct svga_buffer *sbuf)
svga->hud.num_bytes_uploaded += box->w;
svga->hud.num_buffer_uploads++;
}
}
else {
} else {
assert(sbuf->hwbuf);
assert(sbuf->dma.boxes);
SVGA_DBG(DEBUG_DMA, "dma to sid %p\n", sbuf->handle);
@ -793,8 +790,7 @@ svga_buffer_add_range(struct svga_buffer *sbuf, unsigned start, unsigned end)
sbuf->map.ranges[i].start = MIN2(sbuf->map.ranges[i].start, start);
sbuf->map.ranges[i].end = MAX2(sbuf->map.ranges[i].end, end);
return;
}
else {
} else {
/*
* Discontiguous ranges -- keep track of the nearest range.
*/
@ -1005,8 +1001,7 @@ svga_buffer_upload_ranges(struct svga_context *svga,
assert(!sbuf->head.prev && !sbuf->head.next);
list_addtail(&sbuf->head, &svga->dirty_buffers);
}
}
else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
} else if (ret == PIPE_ERROR_OUT_OF_MEMORY) {
/*
* The buffer is too big to fit in the GMR aperture, so break it in
* smaller pieces.
@ -1022,15 +1017,13 @@ svga_buffer_upload_ranges(struct svga_context *svga,
assert(0);
sbuf->map.num_ranges = 0;
}
}
else {
} else {
/*
* There a pending dma already. Make sure it is from this context.
*/
assert(sbuf->dma.svga == svga);
}
}
return;
}

2
src/gallium/drivers/svga/svga_resource_buffer_upload.h
View file

@ -25,7 +25,7 @@ svga_buffer_create_hw_storage(struct svga_screen *ss,
void
svga_buffer_destroy_hw_storage(struct svga_screen *ss,
struct svga_buffer *sbuf);
struct svga_buffer *sbuf);
enum pipe_error
svga_buffer_create_host_surface(struct svga_screen *ss,

6
src/gallium/drivers/svga/svga_resource_texture.c
View file

@ -1318,7 +1318,7 @@ svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen,
if (util_format_is_compressed(texture->format)) {
/* XXX Need to take a closer look to see why texture upload
* with 3D texture with compressed format fails
*/
*/
if (texture->target == PIPE_TEXTURE_3D)
return false;
}
@ -1336,7 +1336,7 @@ svga_texture_transfer_map_can_upload(const struct svga_screen *svgascreen,
*/
static bool
need_update_texture_resource(struct pipe_surface *surf,
struct svga_texture *tex)
struct svga_texture *tex)
{
struct svga_texture *stex = svga_texture(surf->texture);
struct svga_surface *s = svga_surface(surf);
@ -1353,7 +1353,7 @@ need_update_texture_resource(struct pipe_surface *surf,
*/
static void
svga_validate_texture_resource(struct svga_context *svga,
struct svga_texture *tex)
struct svga_texture *tex)
{
if (svga_was_texture_rendered_to(tex) == false)
return;

9
src/gallium/drivers/svga/svga_resource_texture.h
View file

@ -171,11 +171,9 @@ check_face_level(const struct svga_texture *tex,
{
if (tex->b.target == PIPE_TEXTURE_CUBE) {
assert(face < 6);
}
else if (tex->b.target == PIPE_TEXTURE_3D) {
} else if (tex->b.target == PIPE_TEXTURE_3D) {
assert(face < tex->b.depth0);
}
else {
} else {
assert(face < tex->b.array_size);
}
@ -235,8 +233,7 @@ svga_set_texture_dirty(struct svga_texture *tex,
static inline void
svga_clear_texture_dirty(struct svga_texture *tex)
{
unsigned i;
for (i = 0; i < tex->b.depth0 * tex->b.array_size; i++) {
for (unsigned i = 0; i < tex->b.depth0 * tex->b.array_size; i++) {
tex->dirty[i] = 0;
}
tex->modified = false;

2
src/gallium/drivers/svga/svga_sampler_view.c
View file

@ -37,7 +37,7 @@ svga_debug_describe_sampler_view(char *buf, const struct svga_sampler_view *sv)
struct svga_sampler_view *
svga_get_tex_sampler_view(struct pipe_context *pipe,
struct pipe_resource *pt,
struct pipe_resource *pt,
unsigned min_lod, unsigned max_lod)
{
struct svga_context *svga = svga_context(pipe);

2
src/gallium/drivers/svga/svga_sampler_view.h
View file

@ -75,7 +75,7 @@ svga_sampler_view_reference(struct svga_sampler_view **ptr, struct svga_sampler_
{
struct svga_sampler_view *old = *ptr;
if (pipe_reference_described(&(*ptr)->reference, &v->reference,
if (pipe_reference_described(&(*ptr)->reference, &v->reference,
(debug_reference_descriptor)svga_debug_describe_sampler_view))
svga_destroy_sampler_view_priv(old);
*ptr = v;

7
src/gallium/drivers/svga/svga_screen_cache.c
View file

@ -415,13 +415,12 @@ svga_screen_cache_cleanup(struct svga_screen *svgascreen)
{
struct svga_host_surface_cache *cache = &svgascreen->cache;
struct svga_winsys_screen *sws = svgascreen->sws;
unsigned i;
for (i = 0; i < SVGA_HOST_SURFACE_CACHE_SIZE; ++i) {
for (unsigned i = 0; i < SVGA_HOST_SURFACE_CACHE_SIZE; ++i) {
if (cache->entries[i].handle) {
SVGA_DBG(DEBUG_CACHE|DEBUG_DMA,
SVGA_DBG(DEBUG_CACHE|DEBUG_DMA,
"unref sid %p (shutdown)\n", cache->entries[i].handle);
sws->surface_reference(sws, &cache->entries[i].handle, NULL);
sws->surface_reference(sws, &cache->entries[i].handle, NULL);
cache->total_size -= svga_surface_size(&cache->entries[i].key);
}

17
src/gallium/drivers/svga/svga_shader.c
View file

@ -297,9 +297,9 @@ svga_init_shader_key_common(const struct svga_context *svga,
enum pipe_texture_target target = view->target;
assert(target < (1 << 4)); /* texture_target:4 */
key->tex[i].target = target;
key->tex[i].sampler_return_type = vgpu10_return_type(view->format);
key->tex[i].sampler_view = 1;
key->tex[i].target = target;
key->tex[i].sampler_return_type = vgpu10_return_type(view->format);
key->tex[i].sampler_view = 1;
/* 1D/2D array textures with one slice and cube map array textures
* with one cube are treated as non-arrays by the SVGA3D device.
@ -383,9 +383,8 @@ svga_init_shader_key_common(const struct svga_context *svga,
key->tex[i].swizzle_g = swizzle_tab[view->swizzle_g];
key->tex[i].swizzle_b = swizzle_tab[view->swizzle_b];
key->tex[i].swizzle_a = swizzle_tab[view->swizzle_a];
}
else {
key->tex[i].sampler_view = 0;
} else {
key->tex[i].sampler_view = 0;
}
if (sampler) {
@ -393,7 +392,7 @@ svga_init_shader_key_common(const struct svga_context *svga,
if (view) {
assert(idx < (1 << 5)); /* width_height_idx:5 bitfield */
key->tex[i].width_height_idx = idx++;
}
}
key->tex[i].unnormalized = true;
++key->num_unnormalized_coords;
@ -489,7 +488,7 @@ svga_init_shader_key_common(const struct svga_context *svga,
struct pipe_resource *resource = cur_image_view->desc.resource;
if (resource) {
key->images[i].return_type =
key->images[i].return_type =
vgpu10_return_type(cur_image_view->desc.format);
key->images[i].is_array = resource->array_size > 1;
@ -526,7 +525,7 @@ svga_init_shader_key_common(const struct svga_context *svga,
key->raw_shaderbufs = svga->state.raw_shaderbufs[shader_type] &
shader->info.shader_buffers_declared;
key->srv_raw_shaderbuf_index = key->srv_raw_constbuf_index +
SVGA_MAX_CONST_BUFS;
SVGA_MAX_CONST_BUFS;
}
for (unsigned i = 0; i < ARRAY_SIZE(svga->curr.shader_buffers[shader_type]);

4
src/gallium/drivers/svga/svga_shader_buffer.c
View file

@ -107,7 +107,7 @@ svga_set_shader_buffers(struct pipe_context *pipe,
pipe_resource_reference(&cbuf->resource, NULL);
}
cbuf->uav_index = -1;
cbuf->writeAccess = (writeable_bitmask & (1 << j)) != 0;
cbuf->writeAccess = (writeable_bitmask & (1 << j)) != 0;
}
svga->curr.num_shader_buffers[shader] =
MAX2(svga->curr.num_shader_buffers[shader], last_buffer + 1);
@ -334,7 +334,7 @@ svga_validate_shader_buffer_resources(struct svga_context *svga,
*/
bool
svga_shader_buffer_can_use_srv(struct svga_context *svga,
enum pipe_shader_type shader,
enum pipe_shader_type shader,
unsigned index,
struct svga_shader_buffer *buf)
{

43
src/gallium/drivers/svga/svga_state.c
View file

@ -203,10 +203,7 @@ update_state(struct svga_context *svga,
#else
bool debug = false;
#endif
enum pipe_error ret = PIPE_OK;
unsigned i;
ret = svga_hwtnl_flush( svga->hwtnl );
enum pipe_error ret = svga_hwtnl_flush(svga->hwtnl);
if (ret != PIPE_OK)
return ret;
@ -215,12 +212,9 @@ update_state(struct svga_context *svga,
* state flags which are generated and checked to help ensure
* state atoms are ordered correctly in the list.
*/
uint64_t examined, prev;
uint64_t examined = 0, prev = *state;
examined = 0;
prev = *state;
for (i = 0; atoms[i] != NULL; i++) {
for (unsigned i = 0; atoms[i] != NULL; i++) {
uint64_t generated;
assert(atoms[i]->dirty);
@ -229,7 +223,7 @@ update_state(struct svga_context *svga,
if (check_state(*state, atoms[i]->dirty)) {
if (0)
debug_printf("update: %s\n", atoms[i]->name);
ret = atoms[i]->update( svga, *state );
ret = atoms[i]->update(svga, *state);
if (ret != PIPE_OK)
return ret;
}
@ -248,11 +242,10 @@ update_state(struct svga_context *svga,
prev = *state;
accumulate_state(&examined, atoms[i]->dirty);
}
}
else {
for (i = 0; atoms[i] != NULL; i++) {
} else {
for (unsigned i = 0; atoms[i] != NULL; i++) {
if (check_state(*state, atoms[i]->dirty)) {
ret = atoms[i]->update( svga, *state );
ret = atoms[i]->update(svga, *state);
if (ret != PIPE_OK)
return ret;
}
@ -268,7 +261,6 @@ svga_update_state(struct svga_context *svga, unsigned max_level)
{
struct svga_screen *screen = svga_screen(svga->pipe.screen);
enum pipe_error ret = PIPE_OK;
unsigned i;
SVGA_STATS_TIME_PUSH(screen->sws, SVGA_STATS_TIME_UPDATESTATE);
@ -281,13 +273,14 @@ svga_update_state(struct svga_context *svga, unsigned max_level)
svga->dirty |= SVGA_NEW_TEXTURE;
}
unsigned i;
for (i = 0; i <= max_level; i++) {
svga->dirty |= svga->state.dirty[i];
if (svga->dirty) {
ret = update_state( svga,
ret = update_state(svga,
state_levels[i],
&svga->dirty );
&svga->dirty);
if (ret != PIPE_OK)
goto done;
@ -318,7 +311,7 @@ svga_update_state_retry(struct svga_context *svga, unsigned max_level)
{
enum pipe_error ret;
SVGA_RETRY_OOM(svga, ret, svga_update_state( svga, max_level ));
SVGA_RETRY_OOM(svga, ret, svga_update_state(svga, max_level));
return ret == PIPE_OK;
}
@ -366,14 +359,13 @@ svga_emit_initial_state(struct svga_context *svga)
ret = SVGA3D_vgpu10_SetRasterizerState(svga->swc, id);
return ret;
}
else {
} else {
SVGA3dRenderState *rs;
unsigned count = 0;
const unsigned COUNT = 2;
enum pipe_error ret;
ret = SVGA3D_BeginSetRenderState( svga->swc, &rs, COUNT );
ret = SVGA3D_BeginSetRenderState(svga->swc, &rs, COUNT);
if (ret != PIPE_OK)
return ret;
@ -381,11 +373,11 @@ svga_emit_initial_state(struct svga_context *svga)
* which is implemented on all backends.
*/
EMIT_RS(rs, count, SVGA3D_RS_COORDINATETYPE,
SVGA3D_COORDINATE_LEFTHANDED );
EMIT_RS(rs, count, SVGA3D_RS_FRONTWINDING, SVGA3D_FRONTWINDING_CW );
SVGA3D_COORDINATE_LEFTHANDED);
EMIT_RS(rs, count, SVGA3D_RS_FRONTWINDING, SVGA3D_FRONTWINDING_CW);
assert( COUNT == count );
SVGA_FIFOCommitAll( svga->swc );
assert(COUNT == count);
SVGA_FIFOCommitAll(svga->swc);
return PIPE_OK;
}
@ -416,6 +408,7 @@ static const struct svga_tracked_state *compute_state[] =
NULL
};
/**
* Update compute state.
* If the first attempt fails, flush the command buffer and retry.

37
src/gallium/drivers/svga/svga_state.h
View file

@ -15,14 +15,17 @@
struct svga_context;
void svga_init_state( struct svga_context *svga );
void svga_destroy_state( struct svga_context *svga );
void
svga_init_state(struct svga_context *svga);
void
svga_destroy_state(struct svga_context *svga);
struct svga_tracked_state {
const char *name;
uint64_t dirty;
enum pipe_error (*update)( struct svga_context *svga, uint64_t dirty );
enum pipe_error (*update)(struct svga_context *svga, uint64_t dirty);
};
/* NEED_SWTNL
@ -90,24 +93,32 @@ extern struct svga_tracked_state svga_update_swtnl_vdecl;
#define SVGA_STATE_MAX 4
enum pipe_error svga_update_state( struct svga_context *svga,
unsigned level );
enum pipe_error
svga_update_state(struct svga_context *svga, unsigned level);
bool svga_update_state_retry(struct svga_context *svga, unsigned level);
bool
svga_update_state_retry(struct svga_context *svga, unsigned level);
enum pipe_error svga_emit_initial_state( struct svga_context *svga );
enum pipe_error
svga_emit_initial_state(struct svga_context *svga);
enum pipe_error svga_reemit_framebuffer_bindings( struct svga_context *svga );
enum pipe_error
svga_reemit_framebuffer_bindings(struct svga_context *svga);
enum pipe_error svga_rebind_framebuffer_bindings( struct svga_context *svga );
enum pipe_error
svga_rebind_framebuffer_bindings(struct svga_context *svga);
enum pipe_error svga_reemit_tss_bindings( struct svga_context *svga );
enum pipe_error
svga_reemit_tss_bindings(struct svga_context *svga);
enum pipe_error svga_reemit_vs_bindings(struct svga_context *svga);
enum pipe_error
svga_reemit_vs_bindings(struct svga_context *svga);
enum pipe_error svga_reemit_fs_bindings(struct svga_context *svga);
enum pipe_error
svga_reemit_fs_bindings(struct svga_context *svga);
void svga_init_tracked_state(struct svga_context *svga);
void
svga_init_tracked_state(struct svga_context *svga);
void *
svga_create_fs_state(struct pipe_context *pipe,

68
src/gallium/drivers/svga/svga_state_constants.c
View file

@ -37,9 +37,9 @@ svga_get_image_size_constant(const struct svga_context *svga, float **dest,
if (images[shader][i].desc.resource->target == PIPE_BUFFER) {
unsigned bytes_per_element = util_format_get_blocksize(images[shader][i].desc.format);
*dest_u++ = images[shader][i].desc.resource->width0 / bytes_per_element;
}
else
} else {
*dest_u++ = images[shader][i].desc.resource->width0;
}
if (images[shader][i].desc.resource->target == PIPE_TEXTURE_1D_ARRAY)
*dest_u++ = images[shader][i].desc.resource->array_size;
@ -53,8 +53,7 @@ svga_get_image_size_constant(const struct svga_context *svga, float **dest,
else
*dest_u++ = images[shader][i].desc.resource->depth0;
*dest_u++ = 1; // Later this can be used for sample counts
}
else {
} else {
*dest_u += 4;
}
}
@ -88,10 +87,9 @@ svga_get_extra_constants_common(const struct svga_context *svga,
enum pipe_shader_type shader, float *dest)
{
uint32_t *dest_u = (uint32_t *) dest; // uint version of dest
unsigned i;
unsigned count = 0;
for (i = 0; i < variant->key.num_textures; i++) {
for (unsigned i = 0; i < variant->key.num_textures; i++) {
const struct pipe_sampler_view *sv = svga->curr.sampler_views[shader][i];
if (sv) {
const struct pipe_resource *tex = sv->texture;
@ -155,6 +153,7 @@ svga_get_extra_fs_constants(const struct svga_context *svga, float *dest)
return count;
}
/**
* Emit extra constants needed for prescale computation into the
* the buffer pointed to by '*dest'. The updated buffer pointer
@ -162,7 +161,7 @@ svga_get_extra_fs_constants(const struct svga_context *svga, float *dest)
*/
static unsigned
svga_get_prescale_constants(const struct svga_context *svga, float **dest,
const struct svga_prescale *prescale)
const struct svga_prescale *prescale)
{
memcpy(*dest, prescale->scale, 4 * sizeof(float));
*dest += 4;
@ -173,6 +172,7 @@ svga_get_prescale_constants(const struct svga_context *svga, float **dest,
return 2;
}
/**
* Emit extra constants needed for point sprite emulation.
*/
@ -190,6 +190,7 @@ svga_get_pt_sprite_constants(const struct svga_context *svga, float **dest)
return 1;
}
/**
* Emit user-defined clip plane coefficients into the buffer pointed to
* by '*dest'. The updated buffer pointer will be returned in 'dest'.
@ -234,7 +235,7 @@ svga_get_extra_vs_constants(const struct svga_context *svga, float *dest)
*/
if (variant->key.vs.need_prescale) {
count += svga_get_prescale_constants(svga, &dest,
&svga->state.hw_clear.prescale[0]);
&svga->state.hw_clear.prescale[0]);
}
if (variant->key.vs.undo_viewport) {
@ -270,6 +271,7 @@ svga_get_extra_vs_constants(const struct svga_context *svga, float *dest)
return count;
}
/**
* Emit any extra geometry shader constants into the buffer pointed
* to by 'dest'.
@ -292,7 +294,7 @@ svga_get_extra_gs_constants(const struct svga_context *svga, float *dest)
}
if (variant->key.gs.need_prescale) {
unsigned i, num_prescale = 1;
unsigned num_prescale = 1;
/* If prescale is needed and the geometry shader writes to viewport
* index, then prescale for all viewports will be added to the
@ -301,10 +303,10 @@ svga_get_extra_gs_constants(const struct svga_context *svga, float *dest)
if (variant->key.gs.writes_viewport_index)
num_prescale = svga->state.hw_clear.num_prescale;
for (i = 0; i < num_prescale; i++) {
for (unsigned i = 0; i < num_prescale; i++) {
count +=
svga_get_prescale_constants(svga, &dest,
&svga->state.hw_clear.prescale[i]);
&svga->state.hw_clear.prescale[i]);
}
}
@ -355,7 +357,7 @@ svga_get_extra_tes_constants(struct svga_context *svga, float *dest)
if (variant->key.tes.need_prescale) {
count += svga_get_prescale_constants(svga, &dest,
&svga->state.hw_clear.prescale[0]);
&svga->state.hw_clear.prescale[0]);
}
/* SVGA_NEW_CLIP */
@ -484,8 +486,7 @@ emit_const_range(struct svga_context *svga,
svga_shader_type(shader),
SVGA3D_CONST_TYPE_FLOAT,
values + i);
}
else {
} else {
ret = SVGA3D_SetShaderConsts(svga->swc,
offset + i, j - i,
svga_shader_type(shader),
@ -555,7 +556,7 @@ emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
count = cbuf->buffer_size / (4 * sizeof(float));
data += cbuf->buffer_offset / (4 * sizeof(float));
ret = emit_const_range( svga, shader, offset, count, data );
ret = emit_const_range(svga, shader, offset, count, data);
pipe_buffer_unmap(&svga->pipe, transfer);
@ -567,7 +568,6 @@ emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
/* emit extra shader constants */
{
const struct svga_shader_variant *variant = NULL;
unsigned offset;
float extras[MAX_EXTRA_CONSTS][4];
unsigned count;
@ -586,7 +586,7 @@ emit_consts_vgpu9(struct svga_context *svga, enum pipe_shader_type shader)
}
assert(variant);
offset = variant->shader->info.constbuf0_num_uniforms;
unsigned offset = variant->shader->info.constbuf0_num_uniforms;
assert(count <= ARRAY_SIZE(extras));
if (count > 0) {
@ -618,6 +618,7 @@ svga_destroy_rawbuf_srv(struct svga_context *svga)
}
}
/**
* A helper function to emit constant buffer as srv raw buffer.
*/
@ -645,8 +646,7 @@ svga_emit_rawbuf(struct svga_context *svga,
goto done;
}
enabled_rawbufs &= ~(1 << slot);
}
else {
} else {
if ((rawbuf->buffer_offset != buffer_offset) ||
(rawbuf->buffer_size != buffer_size) ||
(rawbuf->buffer != buffer)) {
@ -688,8 +688,7 @@ svga_emit_rawbuf(struct svga_context *svga,
rawbuf->handle = buf_handle;
SVGA_STATS_COUNT_INC(svga_sws(svga), SVGA_STATS_COUNT_RAWBUFFERSRVIEW);
}
else {
} else {
/* Same buffer attributes in the slot. Can use the same SRV. */
assert(rawbuf->srvid != SVGA3D_INVALID_ID);
srvid = rawbuf->srvid;
@ -803,8 +802,7 @@ emit_constbuf(struct svga_context *svga,
svga->state.hw_draw.const0_handle) {
/* re-reference already mapped buffer */
dst_handle = svga->state.hw_draw.const0_handle;
}
else {
} else {
/* we must unmap the buffer before getting the winsys handle */
u_upload_unmap(svga->const0_upload);
@ -815,8 +813,7 @@ emit_constbuf(struct svga_context *svga,
return PIPE_ERROR_OUT_OF_MEMORY;
}
}
}
else if (sbuf) {
} else if (sbuf) {
dst_handle = svga_buffer_handle(svga, &sbuf->b, PIPE_BIND_CONSTANT_BUFFER);
new_buf_size = align(buffer_size, 16);
offset = buffer_offset;
@ -840,8 +837,7 @@ emit_constbuf(struct svga_context *svga,
dst_handle,
offset,
new_buf_size);
}
else if (dst_handle){
} else if (dst_handle){
unsigned command = SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET +
svga_shader_type(shader) - SVGA3D_SHADERTYPE_VS;
ret = SVGA3D_vgpu10_SetConstantBufferOffset(svga->swc,
@ -866,7 +862,8 @@ emit_constbuf(struct svga_context *svga,
* command buffer is submitted, it'll get recycled and we will have
* incorrect constant buffer bindings.
*/
pipe_resource_reference(&svga->state.hw_draw.constbuf[shader][slot], dst_buffer);
pipe_resource_reference(&svga->state.hw_draw.constbuf[shader][slot],
dst_buffer);
svga->state.hw_draw.constbufoffsets[shader][slot].handle = dst_handle;
svga->state.hw_draw.constbufoffsets[shader][slot].size = new_buf_size;
@ -973,8 +970,7 @@ emit_constbuf_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
if (buffer) {
enabled_constbufs |= 1 << index;
}
else {
} else {
enabled_constbufs &= ~(1 << index);
assert(offset == 0);
assert(size == 0);
@ -989,8 +985,7 @@ emit_constbuf_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
if (offset + align(size, 16) <= total_size) {
/* round up size to multiple of 16 */
size = align(size, 16);
}
else {
} else {
/* round down to multiple of 16 (this may cause rendering problems
* but should avoid a device error).
*/
@ -1021,8 +1016,7 @@ emit_constbuf_vgpu10(struct svga_context *svga, enum pipe_shader_type shader)
* at resource validation time.
*/
enabled_constbufs &= ~(1 << index);
}
else {
} else {
if (svga->state.hw_draw.enabled_rawbufs[shader] & (1 << index)) {
ret = svga_emit_rawbuf(svga, index, shader, offset, size, NULL);
if (ret != PIPE_OK) {
@ -1060,8 +1054,7 @@ emit_fs_consts(struct svga_context *svga, uint64_t dirty)
*/
if (svga_have_vgpu10(svga)) {
ret = emit_consts_vgpu10(svga, PIPE_SHADER_FRAGMENT);
}
else {
} else {
ret = emit_consts_vgpu9(svga, PIPE_SHADER_FRAGMENT);
}
@ -1121,8 +1114,7 @@ emit_vs_consts(struct svga_context *svga, uint64_t dirty)
*/
if (svga_have_vgpu10(svga)) {
ret = emit_consts_vgpu10(svga, PIPE_SHADER_VERTEX);
}
else {
} else {
ret = emit_consts_vgpu9(svga, PIPE_SHADER_VERTEX);
}

78
src/gallium/drivers/svga/svga_state_framebuffer.c
View file

@ -198,8 +198,7 @@ emit_fb_vgpu10(struct svga_context *svga)
/* Set the rendered-to flag */
svga_set_texture_rendered_to(svga_texture(s->base.texture));
}
else {
} else {
rtv[i] = NULL;
}
}
@ -219,8 +218,7 @@ emit_fb_vgpu10(struct svga_context *svga)
/* Set the rendered-to flag */
svga_set_texture_rendered_to(svga_texture(s->base.texture));
}
else {
} else {
dsv = NULL;
}
@ -242,8 +240,7 @@ emit_fb_vgpu10(struct svga_context *svga)
/* propagate the backed view surface before unbinding it */
if (hwfb->cbufs[i] && hwfb->cbufs[i]->backed) {
svga_propagate_surface(svga, hwfb->cbufs[i]->backed, true);
}
else if (svga_surface(svga->state.hw_clear.rtv[i]) != hwfb->cbufs[i] &&
} else if (svga_surface(svga->state.hw_clear.rtv[i]) != hwfb->cbufs[i] &&
svga->state.hw_clear.rtv[i]) {
/* Free the alternate surface view when it is unbound. */
pipe_surface_unref(&svga->pipe, &svga->state.hw_clear.rtv[i]);
@ -261,8 +258,7 @@ emit_fb_vgpu10(struct svga_context *svga)
/* propagate the backed view surface before unbinding it */
if (hwfb->zsbuf && hwfb->zsbuf->backed) {
svga_propagate_surface(svga, hwfb->zsbuf->backed, true);
}
else if (svga_surface(svga->state.hw_clear.dsv) != hwfb->zsbuf &&
} else if (svga_surface(svga->state.hw_clear.dsv) != hwfb->zsbuf &&
svga->state.hw_clear.dsv) {
/* Free the alternate surface view when it is unbound. */
pipe_surface_unref(&svga->pipe, &svga->state.hw_clear.dsv);
@ -281,8 +277,7 @@ emit_framebuffer(struct svga_context *svga, uint64_t dirty)
{
if (svga_have_vgpu10(svga)) {
return emit_fb_vgpu10(svga);
}
else {
} else {
return emit_fb_vgpu9(svga);
}
}
@ -305,8 +300,7 @@ svga_reemit_framebuffer_bindings(struct svga_context *svga)
if (svga_have_vgpu10(svga)) {
ret = emit_fb_vgpu10(svga);
}
else {
} else {
ret = svga_reemit_framebuffer_bindings_vgpu9(svga);
}
@ -323,7 +317,6 @@ enum pipe_error
svga_rebind_framebuffer_bindings(struct svga_context *svga)
{
struct svga_hw_clear_state *hw = &svga->state.hw_clear;
unsigned i;
enum pipe_error ret;
assert(svga_have_vgpu10(svga));
@ -331,7 +324,7 @@ svga_rebind_framebuffer_bindings(struct svga_context *svga)
if (!svga->rebind.flags.rendertargets)
return PIPE_OK;
for (i = 0; i < hw->num_rendertargets; i++) {
for (unsigned i = 0; i < hw->num_rendertargets; i++) {
if (hw->rtv[i]) {
ret = svga->swc->resource_rebind(svga->swc,
svga_surface(hw->rtv[i])->handle,
@ -434,8 +427,7 @@ get_viewport_prescale(struct svga_context *svga,
if (svga_have_vgpu10(svga)) {
/* floating point viewport params below */
prescale->translate[1] = fh + fy * 2.0f;
}
else {
} else {
/* integer viewport params below */
prescale->translate[1] = fh - 1.0f + fy * 2.0f;
}
@ -455,8 +447,7 @@ get_viewport_prescale(struct svga_context *svga,
if (fy < 0) {
if (invertY) {
prescale->translate[1] -= fy;
}
else {
} else {
prescale->translate[1] += fy;
}
prescale->scale[1] *= fh / (fh + fy);
@ -477,8 +468,7 @@ get_viewport_prescale(struct svga_context *svga,
float in = fb_height - fy; /* number of vp pixels inside view */
float out = fy + fh - fb_height; /* number of vp pixels out of view */
prescale->translate[1] += fy * out / in;
}
else {
} else {
prescale->translate[1] -= fy * (fh / (fb_height - fy));
prescale->translate[1] += fy;
}
@ -533,8 +523,7 @@ get_viewport_prescale(struct svga_context *svga,
svga->curr.rast->pointsize > 1.0f) {
adjust_x = 0.5;
}
}
else {
} else {
/* Use (-0.5, -0.5) bias for all prim types.
* Regarding line rasterization, this does not seem to satisfy
* the Piglit gl-1.0-ortho-pos test but it generally produces
@ -586,7 +575,6 @@ get_viewport_prescale(struct svga_context *svga,
if (prescale->enabled) {
float H[2];
float J[2];
int i;
SVGA_DBG(DEBUG_VIEWPORT,
"prescale %f,%f %fx%f\n",
@ -629,7 +617,7 @@ get_viewport_prescale(struct svga_context *svga,
*
* Overwrite prescale.translate with values for K:
*/
for (i = 0; i < 2; i++) {
for (int i = 0; i < 2; i++) {
prescale->translate[i] = ((prescale->translate[i] +
(prescale->scale[i] - 1.0f) * J[i]) / H[i]);
}
@ -661,17 +649,16 @@ out:
static enum pipe_error
emit_viewport( struct svga_context *svga,
uint64_t dirty )
emit_viewport(struct svga_context *svga,
uint64_t dirty)
{
struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
SVGA3dViewport viewports[SVGA3D_DX_MAX_VIEWPORTS];
struct svga_prescale prescale[SVGA3D_DX_MAX_VIEWPORTS];
unsigned i;
enum pipe_error ret;
unsigned max_viewports = svgascreen->max_viewports;
for (i = 0; i < max_viewports; i++) {
for (unsigned i = 0; i < max_viewports; i++) {
get_viewport_prescale(svga, &svga->curr.viewport[i],
&viewports[i], &prescale[i]);
}
@ -699,8 +686,7 @@ emit_viewport( struct svga_context *svga,
svga->state.hw_clear.viewport = rect;
svga->state.hw_clear.depthrange.zmin = vp->minDepth;
svga->state.hw_clear.depthrange.zmax = vp->maxDepth;
}
else {
} else {
ret = SVGA3D_vgpu10_SetViewports(svga->swc, max_viewports,
viewports);
if (ret != PIPE_OK)
@ -722,8 +708,7 @@ emit_viewport( struct svga_context *svga,
* for the specified viewport.
*/
unsigned last_prescale = SVGA3D_DX_MAX_VIEWPORTS - 1;
unsigned i;
for (i = SVGA3D_DX_MAX_VIEWPORTS-1; i > 0; i--) {
for (unsigned i = SVGA3D_DX_MAX_VIEWPORTS-1; i > 0; i--) {
if (memcmp(&svga->state.hw_clear.prescale[i],
&svga->state.hw_clear.prescale[i-1],
sizeof svga->state.hw_clear.prescale[0])) {
@ -741,10 +726,10 @@ emit_viewport( struct svga_context *svga,
struct svga_tracked_state svga_hw_viewport =
{
"hw viewport state",
( SVGA_NEW_FRAME_BUFFER |
SVGA_NEW_VIEWPORT |
SVGA_NEW_RAST |
SVGA_NEW_REDUCED_PRIMITIVE ),
(SVGA_NEW_FRAME_BUFFER |
SVGA_NEW_VIEWPORT |
SVGA_NEW_RAST |
SVGA_NEW_REDUCED_PRIMITIVE),
emit_viewport
};
@ -753,8 +738,8 @@ struct svga_tracked_state svga_hw_viewport =
* Scissor state
*/
static enum pipe_error
emit_scissor_rect( struct svga_context *svga,
uint64_t dirty )
emit_scissor_rect(struct svga_context *svga,
uint64_t dirty)
{
struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
const struct pipe_scissor_state *scissor = svga->curr.scissor;
@ -766,9 +751,8 @@ emit_scissor_rect( struct svga_context *svga,
if (svga_have_vgpu10(svga)) {
SVGASignedRect rect[SVGA3D_DX_MAX_VIEWPORTS];
unsigned i;
for (i = 0; i < max_viewports; i++) {
for (unsigned i = 0; i < max_viewports; i++) {
rect[i].left = scissor[i].minx;
rect[i].top = scissor[i].miny;
rect[i].right = scissor[i].maxx;
@ -776,8 +760,7 @@ emit_scissor_rect( struct svga_context *svga,
}
ret = SVGA3D_vgpu10_SetScissorRects(svga->swc, max_viewports, rect);
}
else {
} else {
SVGA3dRect rect;
rect.x = scissor[0].minx;
@ -798,6 +781,7 @@ emit_scissor_rect( struct svga_context *svga,
return PIPE_OK;
}
struct svga_tracked_state svga_hw_scissor =
{
"hw scissor state",
@ -811,15 +795,14 @@ struct svga_tracked_state svga_hw_scissor =
*/
static enum pipe_error
emit_clip_planes( struct svga_context *svga,
uint64_t dirty )
emit_clip_planes(struct svga_context *svga,
uint64_t dirty)
{
unsigned i;
enum pipe_error ret;
/* TODO: just emit directly from svga_set_clip_state()?
*/
for (i = 0; i < SVGA3D_MAX_CLIP_PLANES; i++) {
for (unsigned i = 0; i < SVGA3D_MAX_CLIP_PLANES; i++) {
/* need to express the plane in D3D-style coordinate space.
* GL coords get converted to D3D coords with the matrix:
* [ 1 0 0 0 ]
@ -842,8 +825,7 @@ emit_clip_planes( struct svga_context *svga,
if (svga_have_vgpu10(svga)) {
//debug_printf("XXX emit DX10 clip plane\n");
ret = PIPE_OK;
}
else {
} else {
ret = SVGA3D_SetClipPlane(svga->swc, i, plane);
if (ret != PIPE_OK)
return ret;

10
src/gallium/drivers/svga/svga_state_fs.c
View file

@ -153,14 +153,14 @@ make_fs_key(const struct svga_context *svga,
if (svga->curr.gs) {
key->fs.aa_point = (svga->curr.rast->templ.point_smooth &&
shader->info.gs.in_prim == MESA_PRIM_POINTS &&
shader->info.gs.in_prim == MESA_PRIM_POINTS &&
(svga->curr.rast->pointsize > 1.0 ||
shader->info.writes_psize));
if (key->fs.aa_point) {
assert(svga->curr.gs->aa_point_coord_index != -1);
key->fs.aa_point_coord_index = svga->curr.gs->aa_point_coord_index;
}
}
}
}
@ -168,14 +168,14 @@ make_fs_key(const struct svga_context *svga,
* requires that the incoming fragment color be white. This change
* achieves that by creating a variant of the current fragment
* shader that overrides all output colors with 1,1,1,1
*
*
* This will work for most shaders, including those containing
* TEXKIL and/or depth-write. However, it will break on the
* combination of xor-logicop plus alphatest.
*
* Ultimately, we could implement alphatest in the shader using
* texkil prior to overriding the outgoing fragment color.
*
*
* SVGA_NEW_BLEND
*/
key->fs.white_fragments = svga->curr.blend->need_white_fragments;
@ -405,7 +405,7 @@ done:
return ret;
}
struct svga_tracked_state svga_hw_fs =
struct svga_tracked_state svga_hw_fs =
{
"fragment shader (hwtnl)",
(SVGA_NEW_FS |

2
src/gallium/drivers/svga/svga_state_sampler.c
View file

@ -299,7 +299,7 @@ update_sampler_resources(struct svga_context *svga, uint64_t dirty)
numSR++;
i++;
}
if (emit) {
/* numSR can only be 0 if the first entry of the list
* is the same as the one in the device list.

2
src/gallium/drivers/svga/svga_state_tgsi_transform.c
View file

@ -269,7 +269,7 @@ emulate_point_sprite(struct svga_context *svga,
key.gs.sprite_coord_enable,
key.gs.sprite_origin_upper_left,
key.gs.point_pos_stream_out,
has_texcoord_semantic,
has_texcoord_semantic,
key.gs.aa_point ?
&aa_point_coord_index : NULL);

6
src/gallium/drivers/svga/svga_state_uav.c
View file

@ -429,15 +429,15 @@ svga_create_uav_list(struct svga_context *svga,
&svga->curr.shader_buffers[shader][i];
struct pipe_resource *res = cur_sbuf->resource;
SVGA3dUAViewId uaViewId;
enum pipe_error ret;
enum pipe_error ret;
/* Use srv rawbuffer to access readonly shader buffer */
if (svga_shader_buffer_can_use_srv(svga, shader, i, cur_sbuf)) {
if (svga_shader_buffer_can_use_srv(svga, shader, i, cur_sbuf)) {
ret = svga_shader_buffer_bind_srv(svga, shader, i, cur_sbuf);
if (ret != PIPE_OK)
return ret;
continue;
} else {
} else {
ret = svga_shader_buffer_unbind_srv(svga, shader, i, cur_sbuf);
if (ret != PIPE_OK)
return ret;

29
src/gallium/drivers/svga/svga_state_vdecl.c
View file

@ -27,7 +27,6 @@ emit_hw_vs_vdecl(struct svga_context *svga, uint64_t dirty)
const struct pipe_vertex_element *ve = svga->curr.velems->velem;
SVGA3dVertexDecl decls[SVGA3D_INPUTREG_MAX];
unsigned buffer_indexes[SVGA3D_INPUTREG_MAX];
unsigned i;
unsigned neg_bias = 0;
assert(svga->curr.velems->count >=
@ -48,7 +47,7 @@ emit_hw_vs_vdecl(struct svga_context *svga, uint64_t dirty)
* confusion.
*/
for (i = 0; i < svga->curr.velems->count; i++) {
for (unsigned i = 0; i < svga->curr.velems->count; i++) {
const struct pipe_vertex_buffer *vb =
&svga->curr.vb[ve[i].vertex_buffer_index];
struct svga_buffer *buffer;
@ -67,7 +66,7 @@ emit_hw_vs_vdecl(struct svga_context *svga, uint64_t dirty)
}
}
for (i = 0; i < svga->curr.velems->count; i++) {
for (unsigned i = 0; i < svga->curr.velems->count; i++) {
const struct pipe_vertex_buffer *vb =
&svga->curr.vb[ve[i].vertex_buffer_index];
unsigned usage, index;
@ -77,7 +76,7 @@ emit_hw_vs_vdecl(struct svga_context *svga, uint64_t dirty)
continue;
buffer = svga_buffer(vb->buffer.resource);
svga_generate_vdecl_semantics( i, &usage, &index );
svga_generate_vdecl_semantics(i, &usage, &index);
/* SVGA_NEW_VELEMENT
*/
@ -91,9 +90,9 @@ emit_hw_vs_vdecl(struct svga_context *svga, uint64_t dirty)
* for the negative index bias.
*/
decls[i].array.offset = (vb->buffer_offset
+ ve[i].src_offset
+ neg_bias * ve[i].src_stride
- buffer->uploaded.start);
+ ve[i].src_offset
+ neg_bias * ve[i].src_stride
- buffer->uploaded.start);
assert(decls[i].array.offset >= 0);
@ -112,7 +111,7 @@ emit_hw_vs_vdecl(struct svga_context *svga, uint64_t dirty)
svga->curr.num_vertex_buffers,
svga->curr.vb);
svga_hwtnl_set_index_bias( svga->hwtnl, -(int) neg_bias );
svga_hwtnl_set_index_bias(svga->hwtnl, -(int) neg_bias);
return PIPE_OK;
}
@ -125,18 +124,18 @@ emit_hw_vdecl(struct svga_context *svga, uint64_t dirty)
if (svga->state.sw.need_swtnl)
return PIPE_OK; /* Do not emit during swtnl */
return emit_hw_vs_vdecl( svga, dirty );
return emit_hw_vs_vdecl(svga, dirty);
}
struct svga_tracked_state svga_hw_vdecl =
{
"hw vertex decl state (hwtnl version)",
( SVGA_NEW_NEED_SWTNL |
SVGA_NEW_VELEMENT |
SVGA_NEW_VBUFFER |
SVGA_NEW_RAST |
SVGA_NEW_FS |
SVGA_NEW_VS ),
(SVGA_NEW_NEED_SWTNL |
SVGA_NEW_VELEMENT |
SVGA_NEW_VBUFFER |
SVGA_NEW_RAST |
SVGA_NEW_FS |
SVGA_NEW_VS),
emit_hw_vdecl
};

2
src/gallium/drivers/svga/svga_state_vs.c
View file

@ -339,7 +339,7 @@ done:
return ret;
}
struct svga_tracked_state svga_hw_vs =
struct svga_tracked_state svga_hw_vs =
{
"vertex shader (hwtnl)",
(SVGA_NEW_VS |

6
src/gallium/drivers/svga/svga_swtnl.h
View file

@ -15,9 +15,11 @@ struct pipe_context;
struct vbuf_render;
bool svga_init_swtnl( struct svga_context *svga );
void svga_destroy_swtnl( struct svga_context *svga );
bool
svga_init_swtnl(struct svga_context *svga);
void
svga_destroy_swtnl(struct svga_context *svga);
enum pipe_error
svga_swtnl_draw_vbo(struct svga_context *svga,

2
src/gallium/drivers/svga/svga_swtnl_draw.c
View file

@ -98,7 +98,7 @@ svga_swtnl_draw_vbo(struct svga_context *svga,
}
draw_vbo(draw, info, drawid_offset, indirect, draw_one, 1,
svga->patch_vertices);
svga->patch_vertices);
draw_flush(svga->swtnl.draw);

11
src/gallium/drivers/svga/svga_tgsi.h
View file

@ -28,15 +28,15 @@ struct svga_shader_variant;
* The real use of this information is matching vertex elements to
* fragment shader inputs in the case where vertex shader is disabled.
*/
static inline void svga_generate_vdecl_semantics( unsigned idx,
unsigned *usage,
unsigned *usage_index )
static inline void
svga_generate_vdecl_semantics(unsigned idx,
unsigned *usage,
unsigned *usage_index)
{
if (idx == 0) {
*usage = SVGA3D_DECLUSAGE_POSITION;
*usage_index = 0;
}
else {
} else {
*usage = SVGA3D_DECLUSAGE_TEXCOORD;
*usage_index = idx - 1;
}
@ -65,4 +65,5 @@ struct svga_shader_variant *
svga_tgsi_compile_shader(struct svga_context *svga,
struct svga_shader *shader,
const struct svga_compile_key *key);
#endif

1153
src/gallium/drivers/svga/svga_tgsi_insn.c
View file

File diff suppressed because it is too large Load diff

89
src/gallium/drivers/svga/svga_tgsi_vgpu10.c
View file

@ -2108,7 +2108,7 @@ emit_rasterizer_register(struct svga_shader_emitter_v10 *emit)
/**
* Emit tokens for the "stream" register used by the
* Emit tokens for the "stream" register used by the
* DCL_STREAM, CUT_STREAM, EMIT_STREAM instructions.
*/
static void
@ -4316,7 +4316,6 @@ emit_gs_output_declarations(struct svga_shader_emitter_v10 *emit)
unsigned i;
VGPU10OpcodeToken0 opcode0;
unsigned numStreamsSupported = 1;
int s;
if (emit->version >= 50) {
numStreamsSupported = ARRAY_SIZE(emit->info.num_stream_output_components);
@ -4327,7 +4326,7 @@ emit_gs_output_declarations(struct svga_shader_emitter_v10 *emit)
* stream 0, so any of the auxiliary output declarations will
* go to stream 0.
*/
for (s = numStreamsSupported-1; s >= 0; s--) {
for (int s = numStreamsSupported-1; s >= 0; s--) {
if (emit->info.num_stream_output_components[s] == 0)
continue;
@ -4346,12 +4345,11 @@ emit_gs_output_declarations(struct svga_shader_emitter_v10 *emit)
opcode0.primitiveTopology = emit->gs.prim_topology;
emit_property_instruction(emit, opcode0, 0, 0);
for (i = 0; i < emit->info.num_outputs; i++) {
unsigned writemask;
for (unsigned i = 0; i < emit->info.num_outputs; i++) {
/* find out the writemask for this stream */
writemask = output_writemask_for_stream(s, emit->info.output_streams[i],
emit->output_usage_mask[i]);
unsigned writemask =
output_writemask_for_stream(s, emit->info.output_streams[i],
emit->output_usage_mask[i]);
if (writemask) {
enum tgsi_semantic semantic_name =
@ -4360,7 +4358,7 @@ emit_gs_output_declarations(struct svga_shader_emitter_v10 *emit)
/* TODO: Still need to take care of a special case where a
* single varying spans across multiple output registers.
*/
switch(semantic_name) {
switch (semantic_name) {
case TGSI_SEMANTIC_PRIMID:
emit_output_declaration(emit,
VGPU10_OPCODE_DCL_OUTPUT_SGV, i,
@ -8054,12 +8052,10 @@ emit_sincos(struct svga_shader_emitter_v10 *emit,
begin_emit_instruction(emit);
emit_opcode(emit, VGPU10_OPCODE_SINCOS, false);
if(inst->Instruction.Opcode == TGSI_OPCODE_SIN)
{
if (inst->Instruction.Opcode == TGSI_OPCODE_SIN) {
emit_dst_register(emit, &tmp_dst_x); /* first destination register */
emit_null_dst_register(emit); /* second destination register */
}
else {
} else {
emit_null_dst_register(emit);
emit_dst_register(emit, &tmp_dst_x);
}
@ -8336,8 +8332,7 @@ emit_comparison(struct svga_shader_emitter_v10 *emit,
if (swapSrc) {
emit_src_register(emit, src1);
emit_src_register(emit, src0);
}
else {
} else {
emit_src_register(emit, src0);
emit_src_register(emit, src1);
}
@ -8553,8 +8548,7 @@ end_tex_swizzle(struct svga_shader_emitter_v10 *emit,
emit_opcode(emit, VGPU10_OPCODE_AND, false);
if (swz->swizzled) {
emit_dst_register(emit, &swz->tmp_dst);
}
else {
} else {
emit_dst_register(emit, swz->inst_dst);
}
emit_src_register(emit, &swz->tmp_src);
@ -8792,8 +8786,7 @@ emit_tg4(struct svga_shader_emitter_v10 *emit,
default:
assert(!"Unexpected component in texture gather swizzle");
}
}
else {
} else {
select_swizzle = emit->key.tex[unit].swizzle_r;
}
@ -8801,8 +8794,7 @@ emit_tg4(struct svga_shader_emitter_v10 *emit,
src = make_immediate_reg_float(emit, 1.0);
emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &inst->Dst[0], &src);
return true;
}
else if (select_swizzle == PIPE_SWIZZLE_0) {
} else if (select_swizzle == PIPE_SWIZZLE_0) {
src = make_immediate_reg_float(emit, 0.0);
emit_instruction_op1(emit, VGPU10_OPCODE_MOV, &inst->Dst[0], &src);
return true;
@ -8819,18 +8811,15 @@ emit_tg4(struct svga_shader_emitter_v10 *emit,
if (tgsi_is_shadow_target(target)) {
emit_opcode(emit, VGPU10_OPCODE_GATHER4_PO_C,
inst->Instruction.Saturate);
}
else {
} else {
emit_opcode(emit, VGPU10_OPCODE_GATHER4_PO,
inst->Instruction.Saturate);
}
}
else {
} else {
if (tgsi_is_shadow_target(target)) {
emit_opcode(emit, VGPU10_OPCODE_GATHER4_C,
inst->Instruction.Saturate);
}
else {
} else {
emit_opcode(emit, VGPU10_OPCODE_GATHER4,
inst->Instruction.Saturate);
}
@ -8866,16 +8855,14 @@ emit_tg4(struct svga_shader_emitter_v10 *emit,
if (target == TGSI_TEXTURE_SHADOWCUBE_ARRAY) {
ref = scalar_src(&inst->Src[1], TGSI_SWIZZLE_X);
emit_tex_compare_refcoord(emit, target, &ref);
}
else {
} else {
emit_tex_compare_refcoord(emit, target, &src);
}
}
end_emit_instruction(emit);
free_temp_indexes(emit);
}
else {
} else {
/* Only a single channel is supported in SM4_1 and we report
* pipe_caps.max_texture_gather_components = 1.
* Only the 0th component will be gathered.
@ -9115,8 +9102,7 @@ emit_txf(struct svga_shader_emitter_v10 *emit,
emit_resource_register(emit, unit);
emit_src_register(emit, &sampleIndex);
end_emit_instruction(emit);
}
else {
} else {
/* Fetch one texel specified by integer coordinate */
/* LD dst, coord(s0), resource */
begin_emit_instruction(emit);
@ -9158,8 +9144,7 @@ emit_txl_txb(struct svga_shader_emitter_v10 *emit,
if (inst->Instruction.Opcode == TGSI_OPCODE_TXB2) {
lod_bias = scalar_src(&inst->Src[1], TGSI_SWIZZLE_X);
unit = inst->Src[2].Register.Index;
}
else {
} else {
lod_bias = scalar_src(&inst->Src[0], TGSI_SWIZZLE_W);
unit = inst->Src[1].Register.Index;
}
@ -9175,8 +9160,7 @@ emit_txl_txb(struct svga_shader_emitter_v10 *emit,
begin_emit_instruction(emit);
if (inst->Instruction.Opcode == TGSI_OPCODE_TXL) {
opcode = VGPU10_OPCODE_SAMPLE_L;
}
else {
} else {
opcode = VGPU10_OPCODE_SAMPLE_B;
}
emit_sample_opcode(emit, opcode, inst->Instruction.Saturate, offsets);
@ -9652,7 +9636,7 @@ emit_dtrunc(struct svga_shader_emitter_v10 *emit,
struct tgsi_full_src_register tmp2_src = make_src_temp_reg(tmp2_index);
struct tgsi_full_src_register cond_src_xy =
swizzle_src(&cond_src, PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y,
PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y);
PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y);
struct tgsi_full_src_register one =
make_immediate_reg_double(emit, 1.0);
@ -9733,8 +9717,7 @@ emit_simple(struct svga_shader_emitter_v10 *emit,
if (inst->Instruction.Opcode == TGSI_OPCODE_BGNLOOP) {
emit->current_loop_depth++;
}
else if (inst->Instruction.Opcode == TGSI_OPCODE_ENDLOOP) {
} else if (inst->Instruction.Opcode == TGSI_OPCODE_ENDLOOP) {
emit->current_loop_depth--;
}
@ -10051,10 +10034,9 @@ emit_vmware(struct svga_shader_emitter_v10 *emit,
const struct tgsi_opcode_info *op = tgsi_get_opcode_info(opcode);
const bool dbl_dst = opcode_has_dbl_dst(inst->Instruction.Opcode);
const bool dbl_src = opcode_has_dbl_src(inst->Instruction.Opcode);
unsigned i;
struct tgsi_full_src_register src[3];
for (i = 0; i < op->num_src; i++) {
for (unsigned i = 0; i < op->num_src; i++) {
if (dbl_src)
src[i] = check_double_src(emit, &inst->Src[i]);
else
@ -10075,7 +10057,7 @@ emit_vmware(struct svga_shader_emitter_v10 *emit,
emit_dst_register(emit, &inst->Dst[0]);
emit_null_dst_register(emit);
} else {
for (i = 0; i < op->num_dst; i++) {
for (unsigned i = 0; i < op->num_dst; i++) {
if (dbl_dst) {
check_double_dst_writemask(inst);
}
@ -10083,7 +10065,7 @@ emit_vmware(struct svga_shader_emitter_v10 *emit,
}
}
for (i = 0; i < op->num_src; i++) {
for (unsigned i = 0; i < op->num_src; i++) {
emit_src_register(emit, &src[i]);
}
end_emit_instruction(emit);
@ -11875,7 +11857,7 @@ find_prescale_from_cbuf(struct svga_shader_emitter_v10 *emit,
}
struct tgsi_full_src_register index_src =
make_immediate_reg_int(emit, index);
make_immediate_reg_int(emit, index);
if (index == 0) {
/* GE tmp, vp_index, index */
@ -11941,7 +11923,7 @@ emit_temp_prescale_instructions(struct svga_shader_emitter_v10 *emit)
find_prescale_from_cbuf(emit, 0, emit->vposition.num_prescale,
&vp_index_src_x,
&prescale_scale, &prescale_translate,
&prescale_scale, &prescale_translate,
&tmp_src_x, &tmp_dst);
}
@ -12295,13 +12277,12 @@ emit_alpha_to_one_instructions(struct svga_shader_emitter_v10 *emit,
unsigned fs_color_tmp_index)
{
struct tgsi_full_src_register one = make_immediate_reg_float(emit, 1.0f);
unsigned i;
/* Note: it's not 100% clear from the spec if we're supposed to clobber
* the alpha for all render targets. But that's what NVIDIA does and
* that's what Piglit tests.
*/
for (i = 0; i < emit->fs.num_color_outputs; i++) {
for (unsigned i = 0; i < emit->fs.num_color_outputs; i++) {
struct tgsi_full_dst_register color_dst;
if (fs_color_tmp_index != INVALID_INDEX && i == 0) {
@ -12383,7 +12364,6 @@ emit_broadcast_color_instructions(struct svga_shader_emitter_v10 *emit,
unsigned fs_color_tmp_index)
{
const unsigned n = emit->key.fs.write_color0_to_n_cbufs;
unsigned i;
struct tgsi_full_src_register color_src;
if (emit->key.fs.white_fragments) {
@ -12398,7 +12378,7 @@ emit_broadcast_color_instructions(struct svga_shader_emitter_v10 *emit,
assert(emit->unit == PIPE_SHADER_FRAGMENT);
for (i = 0; i < n; i++) {
for (unsigned i = 0; i < n; i++) {
unsigned output_reg = emit->fs.color_out_index[i];
struct tgsi_full_dst_register color_dst =
make_dst_output_reg(output_reg);
@ -12518,7 +12498,7 @@ emit_rawbuf_instruction(struct svga_shader_emitter_v10 *emit,
int immpos = find_immediate(emit, imm, 0);
if (immpos < 0) {
UNUSED unsigned element_index_imm =
add_immediate_int(emit, element_index);
add_immediate_int(emit, element_index);
}
element_src = make_immediate_reg_int(emit, element_index);
}
@ -12815,7 +12795,7 @@ transform_fs_pstipple(struct svga_shader_emitter_v10 *emit,
*/
static const struct tgsi_token *
transform_fs_aapoint(struct svga_context *svga,
const struct tgsi_token *tokens,
const struct tgsi_token *tokens,
int aa_coord_index)
{
bool need_texcoord_semantic =
@ -12863,8 +12843,7 @@ compute_input_mapping(struct svga_context *svga,
if (prevShader != NULL) {
svga_link_shaders(&prevShader->tgsi_info, &emit->info, &emit->linkage);
emit->prevShaderInfo = &prevShader->tgsi_info;
}
else {
} else {
/**
* Since vertex shader does not need to go through the linker to
* establish the input map, we need to make sure the highest index
@ -13086,7 +13065,7 @@ svga_tgsi_vgpu10_translate(struct svga_context *svga,
}
if (key->fs.aa_point) {
tokens = transform_fs_aapoint(svga, tokens,
key->fs.aa_point_coord_index);
key->fs.aa_point_coord_index);
}
}

91
src/gallium/drivers/svga/svgadump/svga_dump.c
View file

@ -38,7 +38,7 @@ shader_name(unsigned type)
static void
dump_SVGA3dVertexDecl(const SVGA3dVertexDecl *cmd)
{
switch((*cmd).identity.type) {
switch ((*cmd).identity.type) {
case SVGA3D_DECLTYPE_FLOAT1:
_debug_printf("\t\t.identity.type = SVGA3D_DECLTYPE_FLOAT1\n");
break;
@ -97,7 +97,7 @@ dump_SVGA3dVertexDecl(const SVGA3dVertexDecl *cmd)
_debug_printf("\t\t.identity.type = %i\n", (*cmd).identity.type);
break;
}
switch((*cmd).identity.method) {
switch ((*cmd).identity.method) {
case SVGA3D_DECLMETHOD_DEFAULT:
_debug_printf("\t\t.identity.method = SVGA3D_DECLMETHOD_DEFAULT\n");
break;
@ -123,7 +123,7 @@ dump_SVGA3dVertexDecl(const SVGA3dVertexDecl *cmd)
_debug_printf("\t\t.identity.method = %i\n", (*cmd).identity.method);
break;
}
switch((*cmd).identity.usage) {
switch ((*cmd).identity.usage) {
case SVGA3D_DECLUSAGE_POSITION:
_debug_printf("\t\t.identity.usage = SVGA3D_DECLUSAGE_POSITION\n");
break;
@ -185,7 +185,7 @@ static void
dump_SVGA3dTextureState(const SVGA3dTextureState *cmd)
{
_debug_printf("\t\t.stage = %u\n", (*cmd).stage);
switch((*cmd).name) {
switch ((*cmd).name) {
case SVGA3D_TS_INVALID:
_debug_printf("\t\t.name = SVGA3D_TS_INVALID\n");
break;
@ -365,7 +365,7 @@ static void
dump_SVGA3dCmdWaitForQuery(const SVGA3dCmdWaitForQuery *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
switch((*cmd).type) {
switch ((*cmd).type) {
case SVGA3D_QUERYTYPE_OCCLUSION:
_debug_printf("\t\t.type = SVGA3D_QUERYTYPE_OCCLUSION\n");
break;
@ -384,7 +384,7 @@ static void
dump_SVGA3dCmdSetRenderTarget(const SVGA3dCmdSetRenderTarget *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
switch((*cmd).type) {
switch ((*cmd).type) {
case SVGA3D_RT_DEPTH:
_debug_printf("\t\t.type = SVGA3D_RT_DEPTH\n");
break;
@ -421,7 +421,7 @@ static void
dump_SVGA3dCmdSetMaterial(const SVGA3dCmdSetMaterial *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
switch((*cmd).face) {
switch ((*cmd).face) {
case SVGA3D_FACE_INVALID:
_debug_printf("\t\t.face = SVGA3D_FACE_INVALID\n");
break;
@ -468,7 +468,7 @@ dump_SVGA3dCmdSetLightData(const SVGA3dCmdSetLightData *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
_debug_printf("\t\t.index = %u\n", (*cmd).index);
switch((*cmd).data.type) {
switch ((*cmd).data.type) {
case SVGA3D_LIGHTTYPE_INVALID:
_debug_printf("\t\t.data.type = SVGA3D_LIGHTTYPE_INVALID\n");
break;
@ -564,7 +564,7 @@ static void
dump_SVGA3dCmdEndQuery(const SVGA3dCmdEndQuery *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
switch((*cmd).type) {
switch ((*cmd).type) {
case SVGA3D_QUERYTYPE_OCCLUSION:
_debug_printf("\t\t.type = SVGA3D_QUERYTYPE_OCCLUSION\n");
break;
@ -612,7 +612,7 @@ static void
dump_SVGA3dCmdBeginQuery(const SVGA3dCmdBeginQuery *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
switch((*cmd).type) {
switch ((*cmd).type) {
case SVGA3D_QUERYTYPE_OCCLUSION:
_debug_printf("\t\t.type = SVGA3D_QUERYTYPE_OCCLUSION\n");
break;
@ -628,7 +628,7 @@ dump_SVGA3dCmdBeginQuery(const SVGA3dCmdBeginQuery *cmd)
static void
dump_SVGA3dRenderState(const SVGA3dRenderState *cmd)
{
switch((*cmd).state) {
switch ((*cmd).state) {
case SVGA3D_RS_INVALID:
_debug_printf("\t\t.state = SVGA3D_RS_INVALID\n");
break;
@ -945,7 +945,7 @@ dump_SVGA3dCmdDefineShader(const SVGA3dCmdDefineShader *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
_debug_printf("\t\t.shid = %u\n", (*cmd).shid);
switch((*cmd).type) {
switch ((*cmd).type) {
case SVGA3D_SHADERTYPE_VS:
_debug_printf("\t\t.type = SVGA3D_SHADERTYPE_VS\n");
break;
@ -1064,7 +1064,7 @@ dump_SVGA3dCmdSetLightEnabled(const SVGA3dCmdSetLightEnabled *cmd)
static void
dump_SVGA3dPrimitiveRange(const SVGA3dPrimitiveRange *cmd)
{
switch((*cmd).primType) {
switch ((*cmd).primType) {
case SVGA3D_PRIMITIVE_INVALID:
_debug_printf("\t\t.primType = SVGA3D_PRIMITIVE_INVALID\n");
break;
@ -1134,7 +1134,7 @@ dump_SVGA3dCmdSurfaceStretchBlt(const SVGA3dCmdSurfaceStretchBlt *cmd)
_debug_printf("\t\t.boxDest.w = %u\n", (*cmd).boxDest.w);
_debug_printf("\t\t.boxDest.h = %u\n", (*cmd).boxDest.h);
_debug_printf("\t\t.boxDest.d = %u\n", (*cmd).boxDest.d);
switch((*cmd).mode) {
switch ((*cmd).mode) {
case SVGA3D_STRETCH_BLT_POINT:
_debug_printf("\t\t.mode = SVGA3D_STRETCH_BLT_POINT\n");
break;
@ -1159,7 +1159,7 @@ dump_SVGA3dCmdSurfaceDMA(const SVGA3dCmdSurfaceDMA *cmd)
_debug_printf("\t\t.host.sid = %u\n", (*cmd).host.sid);
_debug_printf("\t\t.host.face = %u\n", (*cmd).host.face);
_debug_printf("\t\t.host.mipmap = %u\n", (*cmd).host.mipmap);
switch((*cmd).transfer) {
switch ((*cmd).transfer) {
case SVGA3D_WRITE_HOST_VRAM:
_debug_printf("\t\t.transfer = SVGA3D_WRITE_HOST_VRAM\n");
break;
@ -1185,7 +1185,7 @@ static void
dump_SVGA3dCmdSetTransform(const SVGA3dCmdSetTransform *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
switch((*cmd).type) {
switch ((*cmd).type) {
case SVGA3D_TRANSFORM_INVALID:
_debug_printf("\t\t.type = SVGA3D_TRANSFORM_INVALID\n");
break;
@ -1261,7 +1261,7 @@ dump_SVGA3dCmdDestroyShader(const SVGA3dCmdDestroyShader *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
_debug_printf("\t\t.shid = %u\n", (*cmd).shid);
switch((*cmd).type) {
switch ((*cmd).type) {
case SVGA3D_SHADERTYPE_VS:
_debug_printf("\t\t.type = SVGA3D_SHADERTYPE_VS\n");
break;
@ -1284,7 +1284,7 @@ static void
dump_SVGA3dCmdClear(const SVGA3dCmdClear *cmd)
{
_debug_printf("\t\t.cid = %u\n", (*cmd).cid);
switch((*cmd).clearFlag) {
switch ((*cmd).clearFlag) {
case SVGA3D_CLEAR_COLOR:
_debug_printf("\t\t.clearFlag = SVGA3D_CLEAR_COLOR\n");
break;
@ -1307,7 +1307,7 @@ static void
dump_SVGA3dCmdDefineSurface(const SVGA3dCmdDefineSurface *cmd)
{
_debug_printf("\t\t.sid = %u\n", (*cmd).sid);
switch((*cmd).surfaceFlags) {
switch ((*cmd).surfaceFlags) {
case SVGA3D_SURFACE_CUBEMAP:
_debug_printf("\t\t.surfaceFlags = SVGA3D_SURFACE_CUBEMAP\n");
break;
@ -2062,13 +2062,13 @@ case SVGA_3D_CMD_DX_##CommandCode: \
} \
break
void
void
svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
{
const uint8_t *body = (const uint8_t *)data;
const uint8_t *next = body + size;
switch(cmd_id) {
switch (cmd_id) {
SVGA3D_DUMP_CASE_BASIC(BindContext, BIND_CONTEXT);
SVGA3D_DUMP_CASE_LIST(SetViewports, SET_VIEWPORTS, SVGA3dViewport);
SVGA3D_DUMP_CASE_BASIC(SetShader, SET_SHADER);
@ -2155,7 +2155,7 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
const SVGA3dCmdDefineSurface *cmd = (const SVGA3dCmdDefineSurface *)body;
dump_SVGA3dCmdDefineSurface(cmd);
body = (const uint8_t *)&cmd[1];
while(body + sizeof(SVGA3dSize) <= next) {
while (body + sizeof(SVGA3dSize) <= next) {
dump_SVGA3dSize((const SVGA3dSize *)body);
body += sizeof(SVGA3dSize);
}
@ -2175,7 +2175,7 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
const SVGA3dCmdSurfaceCopy *cmd = (const SVGA3dCmdSurfaceCopy *)body;
dump_SVGA3dCmdSurfaceCopy(cmd);
body = (const uint8_t *)&cmd[1];
while(body + sizeof(SVGA3dCopyBox) <= next) {
while (body + sizeof(SVGA3dCopyBox) <= next) {
dump_SVGA3dCopyBox((const SVGA3dCopyBox *)body);
body += sizeof(SVGA3dCopyBox);
}
@ -2195,11 +2195,11 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
const SVGA3dCmdSurfaceDMA *cmd = (const SVGA3dCmdSurfaceDMA *)body;
dump_SVGA3dCmdSurfaceDMA(cmd);
body = (const uint8_t *)&cmd[1];
while(body + sizeof(SVGA3dCopyBox) <= next) {
while (body + sizeof(SVGA3dCopyBox) <= next) {
dump_SVGA3dCopyBox((const SVGA3dCopyBox *)body);
body += sizeof(SVGA3dCopyBox);
}
while(body + sizeof(SVGA3dCmdSurfaceDMASuffix) <= next) {
while (body + sizeof(SVGA3dCmdSurfaceDMASuffix) <= next) {
dump_SVGA3dCmdSurfaceDMASuffix((const SVGA3dCmdSurfaceDMASuffix *)body);
body += sizeof(SVGA3dCmdSurfaceDMASuffix);
}
@ -2243,7 +2243,7 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
const SVGA3dCmdSetRenderState *cmd = (const SVGA3dCmdSetRenderState *)body;
dump_SVGA3dCmdSetRenderState(cmd);
body = (const uint8_t *)&cmd[1];
while(body + sizeof(SVGA3dRenderState) <= next) {
while (body + sizeof(SVGA3dRenderState) <= next) {
dump_SVGA3dRenderState((const SVGA3dRenderState *)body);
body += sizeof(SVGA3dRenderState);
}
@ -2263,7 +2263,7 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
const SVGA3dCmdSetTextureState *cmd = (const SVGA3dCmdSetTextureState *)body;
dump_SVGA3dCmdSetTextureState(cmd);
body = (const uint8_t *)&cmd[1];
while(body + sizeof(SVGA3dTextureState) <= next) {
while (body + sizeof(SVGA3dTextureState) <= next) {
dump_SVGA3dTextureState((const SVGA3dTextureState *)body);
body += sizeof(SVGA3dTextureState);
}
@ -2315,7 +2315,7 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
const SVGA3dCmdClear *cmd = (const SVGA3dCmdClear *)body;
dump_SVGA3dCmdClear(cmd);
body = (const uint8_t *)&cmd[1];
while(body + sizeof(SVGA3dRect) <= next) {
while (body + sizeof(SVGA3dRect) <= next) {
dump_SVGA3dRect((const SVGA3dRect *)body);
body += sizeof(SVGA3dRect);
}
@ -2327,7 +2327,7 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
const SVGA3dCmdPresent *cmd = (const SVGA3dCmdPresent *)body;
dump_SVGA3dCmdPresent(cmd);
body = (const uint8_t *)&cmd[1];
while(body + sizeof(SVGA3dCopyRect) <= next) {
while (body + sizeof(SVGA3dCopyRect) <= next) {
dump_SVGA3dCopyRect((const SVGA3dCopyRect *)body);
body += sizeof(SVGA3dCopyRect);
}
@ -2374,18 +2374,17 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
_debug_printf("\tSVGA_3D_CMD_DRAW_PRIMITIVES\n");
{
const SVGA3dCmdDrawPrimitives *cmd = (const SVGA3dCmdDrawPrimitives *)body;
unsigned i, j;
dump_SVGA3dCmdDrawPrimitives(cmd);
body = (const uint8_t *)&cmd[1];
for(i = 0; i < cmd->numVertexDecls; ++i) {
for (unsigned i = 0; i < cmd->numVertexDecls; ++i) {
dump_SVGA3dVertexDecl((const SVGA3dVertexDecl *)body);
body += sizeof(SVGA3dVertexDecl);
}
for(j = 0; j < cmd->numRanges; ++j) {
for (unsigned j = 0; j < cmd->numRanges; ++j) {
dump_SVGA3dPrimitiveRange((const SVGA3dPrimitiveRange *)body);
body += sizeof(SVGA3dPrimitiveRange);
}
while(body + sizeof(SVGA3dVertexDivisor) <= next) {
while (body + sizeof(SVGA3dVertexDivisor) <= next) {
dump_SVGA3dVertexDivisor((const SVGA3dVertexDivisor *)body);
body += sizeof(SVGA3dVertexDivisor);
}
@ -2429,7 +2428,7 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
const SVGA3dCmdBlitSurfaceToScreen *cmd = (const SVGA3dCmdBlitSurfaceToScreen *)body;
dump_SVGA3dCmdBlitSurfaceToScreen(cmd);
body = (const uint8_t *)&cmd[1];
while(body + sizeof(SVGASignedRect) <= next) {
while (body + sizeof(SVGASignedRect) <= next) {
dump_SVGASignedRect((const SVGASignedRect *)body);
body += sizeof(SVGASignedRect);
}
@ -2562,42 +2561,40 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
break;
}
while(body + sizeof(uint32_t) <= next) {
while (body + sizeof(uint32_t) <= next) {
_debug_printf("\t\t0x%08x\n", *(const uint32_t *)body);
body += sizeof(uint32_t);
}
while(body + sizeof(uint32_t) <= next)
while (body + sizeof(uint32_t) <= next)
_debug_printf("\t\t0x%02x\n", *body++);
}
void
void
svga_dump_commands(const void *commands, uint32_t size)
{
const uint8_t *next = commands;
const uint8_t *last = next + size;
assert(size % sizeof(uint32_t) == 0);
while(next < last) {
while (next < last) {
const uint32_t cmd_id = *(const uint32_t *)next;
if(SVGA_3D_CMD_BASE <= cmd_id && cmd_id < SVGA_3D_CMD_MAX) {
if (SVGA_3D_CMD_BASE <= cmd_id && cmd_id < SVGA_3D_CMD_MAX) {
const SVGA3dCmdHeader *header = (const SVGA3dCmdHeader *)next;
const uint8_t *body = (const uint8_t *)&header[1];
next = body + header->size;
if(next > last)
if (next > last)
break;
svga_dump_command(cmd_id, body, header->size);
}
else if(cmd_id == SVGA_CMD_FENCE) {
} else if (cmd_id == SVGA_CMD_FENCE) {
_debug_printf("\tSVGA_CMD_FENCE\n");
_debug_printf("\t\t0x%08x\n", ((const uint32_t *)next)[1]);
next += 2*sizeof(uint32_t);
}
else {
} else {
_debug_printf("\t0x%08x\n", cmd_id);
next += sizeof(uint32_t);
}

56
src/gallium/drivers/svga/svgadump/svga_dump.py
View file

@ -67,7 +67,7 @@ class decl_dumper_t(decl_visitor.decl_visitor_t):
def visit_enumeration(self):
if enums:
print ' switch(%s) {' % ("(*cmd)" + self._instance,)
print ' switch (%s) {' % ("(*cmd)" + self._instance,)
for name, value in self.decl.values:
print ' case %s:' % (name,)
print ' _debug_printf("\\t\\t%s = %s\\n");' % (self._instance, name)
@ -97,49 +97,49 @@ class type_dumper_t(type_visitor.type_visitor_t):
def visit_char(self):
self.print_instance('%i')
def visit_unsigned_char(self):
self.print_instance('%u')
def visit_signed_char(self):
self.print_instance('%i')
def visit_wchar(self):
self.print_instance('%i')
def visit_short_int(self):
self.print_instance('%i')
def visit_short_unsigned_int(self):
self.print_instance('%u')
def visit_bool(self):
self.print_instance('%i')
def visit_int(self):
self.print_instance('%i')
def visit_unsigned_int(self):
self.print_instance('%u')
def visit_long_int(self):
self.print_instance('%li')
def visit_long_unsigned_int(self):
self.print_instance('%lu')
def visit_long_long_int(self):
self.print_instance('%lli')
def visit_long_long_unsigned_int(self):
self.print_instance('%llu')
def visit_float(self):
self.print_instance('%f')
def visit_double(self):
self.print_instance('%f')
def visit_array(self):
for i in range(type_traits.array_size(self.type)):
dump_type(self.instance + '[%i]' % i, type_traits.base_type(self.type))
@ -206,13 +206,13 @@ cmds = [
def dump_cmds():
print r'''
void
void
svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
{
const uint8_t *body = (const uint8_t *)data;
const uint8_t *next = body + size;
'''
print ' switch(cmd_id) {'
print ' switch (cmd_id) {'
indexes = 'ijklmn'
for id, header, body, footer in cmds:
print ' case %s:' % id
@ -226,12 +226,12 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
for i in range(len(body)):
struct, count = body[i]
idx = indexes[i]
print ' for(%s = 0; %s < cmd->%s; ++%s) {' % (idx, idx, count, idx)
print ' for (%s = 0; %s < cmd->%s; ++%s) {' % (idx, idx, count, idx)
print ' dump_%s((const %s *)body);' % (struct, struct)
print ' body += sizeof(%s);' % struct
print ' }'
if footer is not None:
print ' while(body + sizeof(%s) <= next) {' % footer
print ' while (body + sizeof(%s) <= next) {' % footer
print ' dump_%s((const %s *)body);' % (footer, footer)
print ' body += sizeof(%s);' % footer
print ' }'
@ -247,37 +247,37 @@ svga_dump_command(uint32_t cmd_id, const void *data, uint32_t size)
print ' break;'
print ' }'
print r'''
while(body + sizeof(uint32_t) <= next) {
while (body + sizeof(uint32_t) <= next) {
_debug_printf("\t\t0x%08x\n", *(const uint32_t *)body);
body += sizeof(uint32_t);
}
while(body + sizeof(uint32_t) <= next)
while (body + sizeof(uint32_t) <= next)
_debug_printf("\t\t0x%02x\n", *body++);
}
'''
print r'''
void
void
svga_dump_commands(const void *commands, uint32_t size)
{
const uint8_t *next = commands;
const uint8_t *last = next + size;
assert(size % sizeof(uint32_t) == 0);
while(next < last) {
while (next < last) {
const uint32_t cmd_id = *(const uint32_t *)next;
if(SVGA_3D_CMD_BASE <= cmd_id && cmd_id < SVGA_3D_CMD_MAX) {
if (SVGA_3D_CMD_BASE <= cmd_id && cmd_id < SVGA_3D_CMD_MAX) {
const SVGA3dCmdHeader *header = (const SVGA3dCmdHeader *)next;
const uint8_t *body = (const uint8_t *)&header[1];
next = body + header->size;
if(next > last)
if (next > last)
break;
svga_dump_command(cmd_id, body, header->size);
}
else if(cmd_id == SVGA_CMD_FENCE) {
else if (cmd_id == SVGA_CMD_FENCE) {
_debug_printf("\tSVGA_CMD_FENCE\n");
_debug_printf("\t\t0x%08x\n", ((const uint32_t *)next)[1]);
next += 2*sizeof(uint32_t);