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freedreno/a5xx+a6xx: Don't allocate LRZ for z32

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We don't do LRZ in this case, so no point in allocating the LRZ buffer.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22895>
This commit is contained in:
Rob Clark 2023-05-07 08:17:05 -07:00 • committed by Marge Bot
parent f46cb3c6c4
commit 0b259e72bd
5 changed files with 17 additions and 31 deletions
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13
src/gallium/drivers/freedreno/a5xx/fd5_draw.c
View file

@ -164,19 +164,6 @@ fd5_draw_vbos(struct fd_context *ctx, const struct pipe_draw_info *info,
fd5_draw_vbo(ctx, info, drawid_offset, indirect, &draws[i], index_offset);
}
static bool
is_z32(enum pipe_format format)
{
switch (format) {
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
case PIPE_FORMAT_Z32_UNORM:
case PIPE_FORMAT_Z32_FLOAT:
return true;
default:
return false;
}
}
static void
fd5_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth)
{

2
src/gallium/drivers/freedreno/a5xx/fd5_resource.c
View file

@ -57,7 +57,7 @@ fd5_setup_slices(struct fd_resource *rsc)
{
struct pipe_resource *prsc = &rsc->b.b;
if (FD_DBG(LRZ) && has_depth(rsc->b.b.format))
if (FD_DBG(LRZ) && has_depth(prsc->format) && !is_z32(prsc->format))
setup_lrz(rsc);
fdl5_layout(&rsc->layout, prsc->format, fd_resource_nr_samples(prsc),

16
src/gallium/drivers/freedreno/a6xx/fd6_draw.cc
View file

@ -421,19 +421,6 @@ fd6_draw_vbos(struct fd_context *ctx, const struct pipe_draw_info *info,
fd_context_all_clean(ctx);
}
static bool
is_z32(enum pipe_format format)
{
switch (format) {
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
case PIPE_FORMAT_Z32_UNORM:
case PIPE_FORMAT_Z32_FLOAT:
return true;
default:
return false;
}
}
static bool
do_lrz_clear(struct fd_context *ctx, enum fd_buffer_mask buffers)
{
@ -444,8 +431,7 @@ do_lrz_clear(struct fd_context *ctx, enum fd_buffer_mask buffers)
struct fd_resource *zsbuf = fd_resource(pfb->zsbuf->texture);
return (buffers & FD_BUFFER_DEPTH) &&
zsbuf->lrz && !is_z32(pfb->zsbuf->format);
return (buffers & FD_BUFFER_DEPTH) && zsbuf->lrz;
}
static bool

4
src/gallium/drivers/freedreno/a6xx/fd6_resource.cc
View file

@ -269,10 +269,10 @@ fd6_setup_slices(struct fd_resource *rsc)
{
struct pipe_resource *prsc = &rsc->b.b;
if (!FD_DBG(NOLRZ) && has_depth(rsc->b.b.format))
if (!FD_DBG(NOLRZ) && has_depth(prsc->format) && !is_z32(prsc->format))
setup_lrz(rsc);
if (rsc->layout.ubwc && !ok_ubwc_format(rsc->b.b.screen, rsc->b.b.format))
if (rsc->layout.ubwc && !ok_ubwc_format(prsc->screen, prsc->format))
rsc->layout.ubwc = false;
fdl6_layout(&rsc->layout, prsc->format, fd_resource_nr_samples(prsc),

13
src/gallium/drivers/freedreno/freedreno_resource.h
View file

@ -253,6 +253,19 @@ has_depth(enum pipe_format format)
return util_format_has_depth(desc);
}
static inline bool
is_z32(enum pipe_format format)
{
switch (format) {
case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
case PIPE_FORMAT_Z32_UNORM:
case PIPE_FORMAT_Z32_FLOAT:
return true;
default:
return false;
}
}
struct fd_transfer {
struct threaded_transfer b;
struct pipe_resource *staging_prsc;