From 0ae1cf46a6c6958cee93363c01c08adc5c845095 Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Wed, 6 Jan 2021 17:54:08 +0100 Subject: [PATCH] radv: fix enabling TC-compat HTILE in GENERAL for writes on GFX10+ It wasn't expected to also enable inside render loops. Fixes: 4bb92d9145f ("radv: enable TC-compat HTILE in GENERAL on GFX10+") Signed-off-by: Samuel Pitoiset Reviewed-by: Bas Nieuwenhuizen Part-of: --- src/amd/vulkan/radv_image.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 86cedea8de6..ff51a07d10e 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -1775,11 +1775,11 @@ bool radv_layout_is_htile_compressed(const struct radv_device *device, * the number of decompressions from/to GENERAL. */ if (radv_image_is_tc_compat_htile(image) && - queue_mask == (1u << RADV_QUEUE_GENERAL)) { + queue_mask == (1u << RADV_QUEUE_GENERAL) && + !in_render_loop) { /* GFX10+ supports compressed writes to HTILE. */ return device->physical_device->rad_info.chip_class >= GFX10 || - (!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) && - !in_render_loop); + !(image->usage & VK_IMAGE_USAGE_STORAGE_BIT); } else { return false; }