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i965: switch vs over to shared shader_info

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Note we access shader_info from the program struct rather than the
nir_shader pointer because shader cache won't create a nir_shader.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Timothy Arceri 2016-10-19 12:28:14 +11:00
parent 92f77e9c01
commit 0ab51f8e16
2 changed files with 3 additions and 4 deletions
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2
src/mesa/drivers/dri/i965/brw_draw.c
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@ -302,7 +302,7 @@ brw_merge_inputs(struct brw_context *brw,
}
if (brw->gen < 8 && !brw->is_haswell) {
uint64_t mask = ctx->VertexProgram._Current->Base.nir->info->inputs_read;
uint64_t mask = ctx->VertexProgram._Current->Base.info.inputs_read;
/* Prior to Haswell, the hardware can't natively support GL_FIXED or
* 2_10_10_10_REV vertex formats. Set appropriate workaround flags.
*/

5
src/mesa/drivers/dri/i965/brw_vs.c
View file

@ -150,9 +150,8 @@ brw_codegen_vs_prog(struct brw_context *brw,
}
uint64_t outputs_written =
brw_vs_outputs_written(brw, key,
vp->program.Base.nir->info->outputs_written);
prog_data.inputs_read = vp->program.Base.nir->info->inputs_read;
brw_vs_outputs_written(brw, key, vp->program.Base.info.outputs_written);
prog_data.inputs_read = vp->program.Base.info.inputs_read;
if (key->copy_edgeflag) {
prog_data.inputs_read |= VERT_BIT_EDGEFLAG;