From 0a9bd16602cef8a95aeb8e98df5d7ad57e1cd23e Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Tue, 17 Sep 2024 16:16:42 +0200 Subject: [PATCH] radv,aco: fix legacy vertex attributes when offset >= stride on GFX6-7 The indexing needs to be adjusted and the best solution seems to use soffset instead of const_offset, it's simpler and generate less prologs than passing the vertex binding strides to the prolog. Fixes dEQP-VK.pipeline.*.vertex_input.legacy_vertex_attributes.*stride_1*. Fixes: 38cbc3c605f ("radv: advertise VK_EXT_legacy_vertex_attributes") Signed-off-by: Samuel Pitoiset Part-of: (cherry picked from commit 15b1790a1e9ef12bcfa0259dea370c3206de4c26) --- .pick_status.json | 2 +- src/amd/compiler/aco_instruction_selection.cpp | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/.pick_status.json b/.pick_status.json index bd2c5a7d0d7..0624c033afc 100644 --- a/.pick_status.json +++ b/.pick_status.json @@ -14,7 +14,7 @@ "description": "radv,aco: fix legacy vertex attributes when offset >= stride on GFX6-7", "nominated": true, "nomination_type": 1, - "resolution": 0, + "resolution": 1, "main_sha": null, "because_sha": "38cbc3c605ff17c813e70521f4a6c8d3a5d1e397", "notes": null diff --git a/src/amd/compiler/aco_instruction_selection.cpp b/src/amd/compiler/aco_instruction_selection.cpp index a0d8cd2ce54..5edf2ee34a0 100644 --- a/src/amd/compiler/aco_instruction_selection.cpp +++ b/src/amd/compiler/aco_instruction_selection.cpp @@ -12889,7 +12889,7 @@ load_unaligned_vs_attrib(Builder& bld, PhysReg dst, Operand desc, Operand index, } else { for (unsigned i = 0; i < size; i++) { Definition def(i ? scratch.advance(i * 4 - 4) : dst, v1); - bld.mubuf(aco_opcode::buffer_load_ubyte, def, desc, index, Operand::c32(0u), offset + i, + bld.mubuf(aco_opcode::buffer_load_ubyte, def, desc, index, Operand::c32(offset + i), 0, false, true); } } @@ -13072,11 +13072,11 @@ select_vs_prolog(Program* program, const struct aco_vs_prolog_info* pinfo, ac_sh else if (vtx_info->chan_byte_size == 8) bld.mtbuf(aco_opcode::tbuffer_load_format_xy, Definition(dest.advance(j * 8u), v2), Operand(cur_desc, s4), - fetch_index, Operand::c32(0u), dfmt, nfmt, offset, false, true); + fetch_index, Operand::c32(offset), dfmt, nfmt, 0, false, true); else bld.mtbuf(aco_opcode::tbuffer_load_format_x, Definition(dest.advance(j * 4u), v1), - Operand(cur_desc, s4), fetch_index, Operand::c32(0u), dfmt, nfmt, - offset, false, true); + Operand(cur_desc, s4), fetch_index, Operand::c32(offset), dfmt, nfmt, + 0, false, true); } unsigned slots = vtx_info->chan_byte_size == 8 && vtx_info->num_channels > 2 ? 2 : 1;