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gallium,mesa: remove ir_type param when get_compute_param

Browse source 
We are going to convert compute cap query to struct access,
so remove this param.

Reviewed-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Acked-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33176>
This commit is contained in:
Qiang Yu 2025-01-20 16:51:06 +08:00
parent 55be769f6d
commit 0a5c8853ab
27 changed files with 45 additions and 65 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

18
docs/gallium/screen.rst
View file

@ -754,30 +754,30 @@ pipe_screen::get_compute_param.
``processor-arch-manufacturer-os`` that will be passed on to the compiler.
This CAP is only relevant for drivers that specify PIPE_SHADER_IR_NATIVE for
their preferred IR.
Value type: null-terminated string. Shader IR type dependent.
Value type: null-terminated string.
* ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
for grid and block coordinates. Value type: ``uint64_t``. Shader IR type dependent.
for grid and block coordinates. Value type: ``uint64_t``.
* ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
units. Value type: ``uint64_t []``. Shader IR type dependent.
units. Value type: ``uint64_t []``.
* ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread
units. Value type: ``uint64_t []``. Shader IR type dependent.
units. Value type: ``uint64_t []``.
* ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE_CLOVER``: Same as ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``
but used by clover only.
* ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that
a single block can contain. Value type: ``uint64_t``. Shader IR type dependent.
a single block can contain. Value type: ``uint64_t``.
This may be less than the product of the components of MAX_BLOCK_SIZE and is
usually limited by the number of threads that can be resident simultaneously
on a compute unit.
* ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK_CLOVER``: Same as
``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK`` but used by clover only.
* ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL
resource. Value type: ``uint64_t``. Shader IR type dependent.
resource. Value type: ``uint64_t``.
* ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL
resource. Value type: ``uint64_t``. Shader IR type dependent.
resource. Value type: ``uint64_t``.
* ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE
resource. Value type: ``uint64_t``. Shader IR type dependent.
resource. Value type: ``uint64_t``.
* ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT
resource. Value type: ``uint64_t``. Shader IR type dependent.
resource. Value type: ``uint64_t``.
* ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
allocation in bytes. Value type: ``uint64_t``.
* ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU

3
src/gallium/auxiliary/driver_ddebug/dd_screen.c
View file

@ -76,13 +76,12 @@ dd_screen_get_disk_shader_cache(struct pipe_screen *_screen)
static int
dd_screen_get_compute_param(struct pipe_screen *_screen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{
struct pipe_screen *screen = dd_screen(_screen)->screen;
return screen->get_compute_param(screen, ir_type, param, ret);
return screen->get_compute_param(screen, param, ret);
}
static int

3
src/gallium/auxiliary/driver_noop/noop_pipe.c
View file

@ -506,13 +506,12 @@ static int noop_get_shader_param(struct pipe_screen* pscreen,
}
static int noop_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{
struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen;
return screen->get_compute_param(screen, ir_type, param, ret);
return screen->get_compute_param(screen, param, ret);
}
static bool noop_is_format_supported(struct pipe_screen* pscreen,

4
src/gallium/auxiliary/driver_trace/tr_screen.c
View file

@ -177,7 +177,6 @@ trace_screen_get_shader_param(struct pipe_screen *_screen,
static int
trace_screen_get_compute_param(struct pipe_screen *_screen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *data)
{
@ -188,11 +187,10 @@ trace_screen_get_compute_param(struct pipe_screen *_screen,
trace_dump_call_begin("pipe_screen", "get_compute_param");
trace_dump_arg(ptr, screen);
trace_dump_arg_enum(pipe_shader_ir, ir_type);
trace_dump_arg_enum(pipe_compute_cap, param);
trace_dump_arg(ptr, data);
result = screen->get_compute_param(screen, ir_type, param, data);
result = screen->get_compute_param(screen, param, data);
trace_dump_ret(int, result);

2
src/gallium/drivers/asahi/agx_pipe.c
View file

@ -2078,7 +2078,7 @@ agx_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type shader,
}
static int
agx_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
agx_get_compute_param(struct pipe_screen *pscreen,
enum pipe_compute_cap param, void *ret)
{
struct agx_device *dev = agx_device(pscreen);

1
src/gallium/drivers/crocus/crocus_screen.c
View file

@ -229,7 +229,6 @@ crocus_get_shader_param(struct pipe_screen *pscreen,
static int
crocus_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{

1
src/gallium/drivers/d3d12/d3d12_screen.cpp
View file

@ -236,7 +236,6 @@ d3d12_get_shader_param(struct pipe_screen *pscreen,
static int
d3d12_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir,
enum pipe_compute_cap cap,
void *ret)
{

2
src/gallium/drivers/freedreno/freedreno_screen.c
View file

@ -344,7 +344,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
* into per-generation backend?
*/
static int
fd_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
fd_get_compute_param(struct pipe_screen *pscreen,
enum pipe_compute_cap param, void *ret)
{
struct fd_screen *screen = fd_screen(pscreen);

1
src/gallium/drivers/iris/iris_screen.c
View file

@ -274,7 +274,6 @@ iris_get_shader_param(struct pipe_screen *pscreen,
static int
iris_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{

1
src/gallium/drivers/llvmpipe/lp_screen.c
View file

@ -175,7 +175,6 @@ llvmpipe_get_shader_param(struct pipe_screen *screen,
static int
llvmpipe_get_compute_param(struct pipe_screen *_screen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{

1
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View file

@ -175,7 +175,6 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen,
static int
nv50_screen_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param, void *data)
{
struct nv50_screen *screen = nv50_screen(pscreen);

1
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View file

@ -192,7 +192,6 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen,
static int
nvc0_screen_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param, void *data)
{
struct nvc0_screen *screen = nvc0_screen(pscreen);

1
src/gallium/drivers/panfrost/pan_screen.c
View file

@ -448,7 +448,6 @@ panfrost_is_dmabuf_modifier_supported(struct pipe_screen *screen,
static int
panfrost_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param, void *ret)
{
struct panfrost_device *dev = pan_device(pscreen);

2
src/gallium/drivers/r600/r600_pipe.c
View file

@ -269,7 +269,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen,
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
if (shader == PIPE_SHADER_COMPUTE) {
uint64_t max_const_buffer_size;
pscreen->get_compute_param(pscreen, PIPE_SHADER_IR_NIR,
pscreen->get_compute_param(pscreen,
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
&max_const_buffer_size);
return MIN2(max_const_buffer_size, INT_MAX);

3
src/gallium/drivers/r600/r600_pipe_common.c
View file

@ -850,7 +850,6 @@ const char *r600_get_llvm_processor_name(enum radeon_family family)
}
static int r600_get_compute_param(struct pipe_screen *screen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{
@ -929,7 +928,7 @@ static int r600_get_compute_param(struct pipe_screen *screen,
uint64_t *max_global_size = ret;
uint64_t max_mem_alloc_size;
r600_get_compute_param(screen, ir_type,
r600_get_compute_param(screen,
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
&max_mem_alloc_size);

4
src/gallium/drivers/radeonsi/si_get.c
View file

@ -812,7 +812,7 @@ static bool si_vid_is_target_buffer_supported(struct pipe_screen *screen,
return si_vid_is_format_supported(screen, format, profile, entrypoint);
}
static int si_get_compute_param(struct pipe_screen *screen, enum pipe_shader_ir ir_type,
static int si_get_compute_param(struct pipe_screen *screen,
enum pipe_compute_cap param, void *ret)
{
struct si_screen *sscreen = (struct si_screen *)screen;
@ -891,7 +891,7 @@ static int si_get_compute_param(struct pipe_screen *screen, enum pipe_shader_ir
uint64_t *max_global_size = ret;
uint64_t max_mem_alloc_size;
si_get_compute_param(screen, ir_type, PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
si_get_compute_param(screen, PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE,
&max_mem_alloc_size);
/* In OpenCL, the MAX_MEM_ALLOC_SIZE must be at least

1
src/gallium/drivers/softpipe/sp_screen.c
View file

@ -414,7 +414,6 @@ softpipe_flush_frontbuffer(struct pipe_screen *_screen,
static int
softpipe_get_compute_param(struct pipe_screen *_screen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{

1
src/gallium/drivers/svga/svga_screen.c
View file

@ -470,7 +470,6 @@ svga_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
static int
svga_sm5_get_compute_param(struct pipe_screen *screen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{

3
src/gallium/drivers/tegra/tegra_screen.c
View file

@ -95,13 +95,12 @@ tegra_screen_get_video_param(struct pipe_screen *pscreen,
static int
tegra_screen_get_compute_param(struct pipe_screen *pscreen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *retp)
{
struct tegra_screen *screen = to_tegra_screen(pscreen);
return screen->gpu->get_compute_param(screen->gpu, ir_type, param,
return screen->gpu->get_compute_param(screen->gpu, param,
retp);
}

2
src/gallium/drivers/v3d/v3d_screen.c
View file

@ -219,7 +219,7 @@ v3d_screen_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_type s
}
static int
v3d_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
v3d_get_compute_param(struct pipe_screen *pscreen,
enum pipe_compute_cap param, void *ret)
{
struct v3d_screen *screen = v3d_screen(pscreen);

1
src/gallium/drivers/virgl/virgl_screen.c
View file

@ -278,7 +278,6 @@ virgl_get_video_param(struct pipe_screen *screen,
static int
virgl_get_compute_param(struct pipe_screen *screen,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret)
{

2
src/gallium/drivers/zink/zink_screen.c
View file

@ -450,7 +450,7 @@ zink_screen_get_pipeline_cache(struct zink_screen *screen, struct zink_program *
}
static int
zink_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
zink_get_compute_param(struct pipe_screen *pscreen,
enum pipe_compute_cap param, void *ret)
{
struct zink_screen *screen = zink_screen(pscreen);

30
src/gallium/frontends/clover/core/device.cpp
View file

@ -36,12 +36,12 @@ using namespace clover;
namespace {
template<typename T>
std::vector<T>
get_compute_param(pipe_screen *pipe, pipe_shader_ir ir_format,
get_compute_param(pipe_screen *pipe,
pipe_compute_cap cap) {
int sz = pipe->get_compute_param(pipe, ir_format, cap, NULL);
int sz = pipe->get_compute_param(pipe, cap, NULL);
std::vector<T> v(sz / sizeof(T));
pipe->get_compute_param(pipe, ir_format, cap, &v.front());
pipe->get_compute_param(pipe, cap, &v.front());
return v;
}
@ -269,19 +269,19 @@ device::max_samplers() const {
cl_ulong
device::max_mem_global() const {
return get_compute_param<uint64_t>(pipe, ir_format(),
return get_compute_param<uint64_t>(pipe,
PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE)[0];
}
cl_ulong
device::max_mem_local() const {
return get_compute_param<uint64_t>(pipe, ir_format(),
return get_compute_param<uint64_t>(pipe,
PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE)[0];
}
cl_ulong
device::max_mem_input() const {
return get_compute_param<uint64_t>(pipe, ir_format(),
return get_compute_param<uint64_t>(pipe,
PIPE_COMPUTE_CAP_MAX_INPUT_SIZE)[0];
}
@ -300,24 +300,24 @@ device::max_const_buffers() const {
size_t
device::max_threads_per_block() const {
return get_compute_param<uint64_t>(
pipe, ir_format(), PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK_CLOVER)[0];
pipe, PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK_CLOVER)[0];
}
cl_ulong
device::max_mem_alloc_size() const {
return get_compute_param<uint64_t>(pipe, ir_format(),
return get_compute_param<uint64_t>(pipe,
PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE)[0];
}
cl_uint
device::max_clock_frequency() const {
return get_compute_param<uint32_t>(pipe, ir_format(),
return get_compute_param<uint32_t>(pipe,
PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY)[0];
}
cl_uint
device::max_compute_units() const {
return get_compute_param<uint32_t>(pipe, ir_format(),
return get_compute_param<uint32_t>(pipe,
PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS)[0];
}
@ -328,7 +328,7 @@ device::max_printf_buffer_size() const {
bool
device::image_support() const {
bool supports_images = get_compute_param<uint32_t>(pipe, ir_format(),
bool supports_images = get_compute_param<uint32_t>(pipe,
PIPE_COMPUTE_CAP_IMAGES_SUPPORTED)[0];
if (!supports_images)
return false;
@ -414,7 +414,7 @@ device::allows_user_pointers() const {
std::vector<size_t>
device::max_block_size() const {
auto v = get_compute_param<uint64_t>(pipe, ir_format(),
auto v = get_compute_param<uint64_t>(pipe,
PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE_CLOVER);
return { v.begin(), v.end() };
}
@ -422,7 +422,7 @@ device::max_block_size() const {
cl_uint
device::subgroup_size() const {
cl_uint subgroup_sizes =
get_compute_param<uint32_t>(pipe, ir_format(), PIPE_COMPUTE_CAP_SUBGROUP_SIZES)[0];
get_compute_param<uint32_t>(pipe, PIPE_COMPUTE_CAP_SUBGROUP_SIZES)[0];
if (!subgroup_sizes)
return 0;
return 1 << (util_last_bit(subgroup_sizes) - 1);
@ -430,7 +430,7 @@ device::subgroup_size() const {
cl_uint
device::address_bits() const {
return get_compute_param<uint32_t>(pipe, ir_format(),
return get_compute_param<uint32_t>(pipe,
PIPE_COMPUTE_CAP_ADDRESS_BITS)[0];
}
@ -453,7 +453,7 @@ device::ir_format() const {
std::string
device::ir_target() const {
std::vector<char> target = get_compute_param<char>(
pipe, ir_format(), PIPE_COMPUTE_CAP_IR_TARGET);
pipe, PIPE_COMPUTE_CAP_IR_TARGET);
return { target.data() };
}

8
src/gallium/frontends/lavapipe/lvp_device.c
View file

@ -782,14 +782,14 @@ lvp_get_properties(const struct lvp_physical_device *device, struct vk_propertie
uint64_t grid_size[3], block_size[3];
uint64_t max_threads_per_block, max_local_size;
device->pscreen->get_compute_param(device->pscreen, PIPE_SHADER_IR_NIR,
device->pscreen->get_compute_param(device->pscreen,
PIPE_COMPUTE_CAP_MAX_GRID_SIZE, grid_size);
device->pscreen->get_compute_param(device->pscreen, PIPE_SHADER_IR_NIR,
device->pscreen->get_compute_param(device->pscreen,
PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE, block_size);
device->pscreen->get_compute_param(device->pscreen, PIPE_SHADER_IR_NIR,
device->pscreen->get_compute_param(device->pscreen,
PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK,
&max_threads_per_block);
device->pscreen->get_compute_param(device->pscreen, PIPE_SHADER_IR_NIR,
device->pscreen->get_compute_param(device->pscreen,
PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
&max_local_size);

1
src/gallium/frontends/rusticl/mesa/pipe/screen.rs
View file

@ -298,7 +298,6 @@ impl PipeScreen {
unsafe {
self.screen().get_compute_param.unwrap()(
self.screen.as_ptr(),
pipe_shader_ir::PIPE_SHADER_IR_NIR,
cap,
ptr,
)

3
src/gallium/include/pipe/p_screen.h
View file

@ -151,8 +151,6 @@ struct pipe_screen {
/**
* Query a compute-specific capability/parameter/limit.
* \param ir_type shader IR type for which the param applies, or don't care
* if the param is not shader related
* \param param one of PIPE_COMPUTE_CAP_x
* \param ret pointer to a preallocated buffer that will be
* initialized to the parameter value, or NULL.
@ -160,7 +158,6 @@ struct pipe_screen {
* returned.
*/
int (*get_compute_param)(struct pipe_screen *,
enum pipe_shader_ir ir_type,
enum pipe_compute_cap param,
void *ret);

10
src/mesa/state_tracker/st_extensions.c
View file

@ -1668,14 +1668,14 @@ void st_init_extensions(struct pipe_screen *screen,
uint64_t grid_size[3], block_size[3];
uint64_t max_local_size, max_threads_per_block;
screen->get_compute_param(screen, PIPE_SHADER_IR_NIR,
screen->get_compute_param(screen,
PIPE_COMPUTE_CAP_MAX_GRID_SIZE, grid_size);
screen->get_compute_param(screen, PIPE_SHADER_IR_NIR,
screen->get_compute_param(screen,
PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE, block_size);
screen->get_compute_param(screen, PIPE_SHADER_IR_NIR,
screen->get_compute_param(screen,
PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK,
&max_threads_per_block);
screen->get_compute_param(screen, PIPE_SHADER_IR_NIR,
screen->get_compute_param(screen,
PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE,
&max_local_size);
@ -1696,7 +1696,7 @@ void st_init_extensions(struct pipe_screen *screen,
if (extensions->ARB_compute_shader) {
uint64_t max_variable_threads_per_block = 0;
screen->get_compute_param(screen, PIPE_SHADER_IR_NIR,
screen->get_compute_param(screen,
PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK,
&max_variable_threads_per_block);