mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-06 15:20:17 +01:00
gallium: remove ir arg from pipe_screen.get_compiler_options
It's always PIPE_SHADER_IR_NIR. Reviewed-by: Marek Olšák <marek.olsak@amd.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/35931>
This commit is contained in:
parent
bda89200ce
commit
0a4569fc92
46 changed files with 65 additions and 127 deletions
|
|
@ -56,14 +56,13 @@ dd_screen_get_device_vendor(struct pipe_screen *_screen)
|
|||
return screen->get_device_vendor(screen);
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
dd_screen_get_compiler_options(struct pipe_screen *_screen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct pipe_screen *screen = dd_screen(_screen)->screen;
|
||||
|
||||
return screen->get_compiler_options(screen, ir, shader);
|
||||
return screen->get_compiler_options(screen, shader);
|
||||
}
|
||||
|
||||
static struct disk_cache *
|
||||
|
|
|
|||
|
|
@ -571,13 +571,12 @@ static struct disk_cache *noop_get_disk_shader_cache(struct pipe_screen *pscreen
|
|||
return screen->get_disk_shader_cache(screen);
|
||||
}
|
||||
|
||||
static const void *noop_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
static const struct nir_shader_compiler_options *noop_get_compiler_options(
|
||||
struct pipe_screen *pscreen, enum pipe_shader_type shader)
|
||||
{
|
||||
struct pipe_screen *screen = ((struct noop_pipe_screen*)pscreen)->oscreen;
|
||||
|
||||
return screen->get_compiler_options(screen, ir, shader);
|
||||
return screen->get_compiler_options(screen, shader);
|
||||
}
|
||||
|
||||
static char *noop_finalize_nir(struct pipe_screen *pscreen, struct nir_shader *nir)
|
||||
|
|
|
|||
|
|
@ -105,22 +105,20 @@ trace_screen_get_device_vendor(struct pipe_screen *_screen)
|
|||
}
|
||||
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
trace_screen_get_compiler_options(struct pipe_screen *_screen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct trace_screen *tr_scr = trace_screen(_screen);
|
||||
struct pipe_screen *screen = tr_scr->screen;
|
||||
const void *result;
|
||||
const struct nir_shader_compiler_options *result;
|
||||
|
||||
trace_dump_call_begin("pipe_screen", "get_compiler_options");
|
||||
|
||||
trace_dump_arg(ptr, screen);
|
||||
trace_dump_arg_enum(pipe_shader_ir, ir);
|
||||
trace_dump_arg_enum(pipe_shader_type, shader);
|
||||
|
||||
result = screen->get_compiler_options(screen, ir, shader);
|
||||
result = screen->get_compiler_options(screen, shader);
|
||||
|
||||
trace_dump_ret(ptr, result);
|
||||
|
||||
|
|
|
|||
|
|
@ -2247,7 +2247,7 @@ ttn_compile_init(const void *tgsi_tokens,
|
|||
|
||||
if (!options) {
|
||||
options =
|
||||
screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR, scan.processor);
|
||||
screen->get_compiler_options(screen, scan.processor);
|
||||
}
|
||||
|
||||
c->build = nir_builder_init_simple_shader(tgsi_processor_to_shader_stage(scan.processor),
|
||||
|
|
@ -2609,7 +2609,7 @@ load_nir_from_disk_cache(struct disk_cache *cache,
|
|||
unsigned processor)
|
||||
{
|
||||
const nir_shader_compiler_options *options =
|
||||
screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR, processor);
|
||||
screen->get_compiler_options(screen, processor);
|
||||
struct blob_reader blob_reader;
|
||||
size_t size;
|
||||
nir_shader *s;
|
||||
|
|
|
|||
|
|
@ -101,7 +101,7 @@ static nir_def *cs_create_shader(struct vl_compositor *c, struct cs_shader *s)
|
|||
const struct glsl_type *image_type =
|
||||
glsl_image_type(GLSL_SAMPLER_DIM_2D, /*is_array*/ false, GLSL_TYPE_FLOAT);
|
||||
const nir_shader_compiler_options *options =
|
||||
c->pipe->screen->get_compiler_options(c->pipe->screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
|
||||
c->pipe->screen->get_compiler_options(c->pipe->screen, PIPE_SHADER_COMPUTE);
|
||||
|
||||
s->b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "vl:%s", s->name);
|
||||
nir_builder *b = &s->b;
|
||||
|
|
|
|||
|
|
@ -33,7 +33,7 @@ create_deint_shader(struct vl_deint_filter *filter, unsigned field)
|
|||
const struct glsl_type *image_type =
|
||||
glsl_image_type(GLSL_SAMPLER_DIM_2D, false, GLSL_TYPE_FLOAT);
|
||||
const nir_shader_compiler_options *options =
|
||||
filter->pipe->screen->get_compiler_options(filter->pipe->screen, PIPE_SHADER_IR_NIR, PIPE_SHADER_COMPUTE);
|
||||
filter->pipe->screen->get_compiler_options(filter->pipe->screen, PIPE_SHADER_COMPUTE);
|
||||
|
||||
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "vl:deint");
|
||||
b.shader->info.workgroup_size[0] = 8;
|
||||
|
|
|
|||
|
|
@ -57,8 +57,7 @@ static void *
|
|||
asahi_blit_compute_shader(struct pipe_context *ctx, struct asahi_blit_key *key)
|
||||
{
|
||||
const nir_shader_compiler_options *options =
|
||||
ctx->screen->get_compiler_options(ctx->screen, PIPE_SHADER_IR_NIR,
|
||||
PIPE_SHADER_COMPUTE);
|
||||
ctx->screen->get_compiler_options(ctx->screen, PIPE_SHADER_COMPUTE);
|
||||
|
||||
nir_builder b_ =
|
||||
nir_builder_init_simple_shader(MESA_SHADER_COMPUTE, options, "blit_cs");
|
||||
|
|
|
|||
|
|
@ -2293,8 +2293,8 @@ agx_destroy_screen(struct pipe_screen *pscreen)
|
|||
ralloc_free(screen);
|
||||
}
|
||||
|
||||
static const void *
|
||||
agx_get_compiler_options(struct pipe_screen *pscreen, enum pipe_shader_ir ir,
|
||||
static const struct nir_shader_compiler_options *
|
||||
agx_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
return &agx_nir_options;
|
||||
|
|
|
|||
|
|
@ -481,14 +481,12 @@ crocus_query_memory_info(struct pipe_screen *pscreen,
|
|||
{
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
crocus_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type pstage)
|
||||
{
|
||||
struct crocus_screen *screen = (struct crocus_screen *) pscreen;
|
||||
gl_shader_stage stage = stage_from_pipe(pstage);
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
|
||||
return screen->compiler->nir_options[stage];
|
||||
}
|
||||
|
|
|
|||
|
|
@ -49,12 +49,10 @@
|
|||
#include "dxil_validator.h"
|
||||
#endif
|
||||
|
||||
const void *
|
||||
const struct nir_shader_compiler_options *
|
||||
d3d12_get_compiler_options(struct pipe_screen *screen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
return &d3d12_screen(screen)->nir_options;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -64,9 +64,8 @@ enum d3d12_state_var {
|
|||
|
||||
#define D3D12_MAX_POINT_SIZE 255.0f
|
||||
|
||||
const void *
|
||||
const struct nir_shader_compiler_options *
|
||||
d3d12_get_compiler_options(struct pipe_screen *screen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader);
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -950,9 +950,9 @@ etna_screen_bo_from_handle(struct pipe_screen *pscreen,
|
|||
return bo;
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
etna_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir, enum pipe_shader_type shader)
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
return etna_compiler_get_options(etna_screen(pscreen)->compiler);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ build_f16_copy_fs_shader(struct pipe_screen *pscreen, enum pipe_texture_target t
|
|||
};
|
||||
|
||||
const nir_shader_compiler_options *options =
|
||||
pscreen->get_compiler_options(pscreen, PIPE_SHADER_IR_NIR, PIPE_SHADER_FRAGMENT);
|
||||
pscreen->get_compiler_options(pscreen, PIPE_SHADER_FRAGMENT);
|
||||
nir_builder _b =
|
||||
nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT, options,
|
||||
"f16 copy %s fs",
|
||||
|
|
|
|||
|
|
@ -676,8 +676,8 @@ fd_init_screen_caps(struct fd_screen *screen)
|
|||
caps->shader_clock = is_a6xx(screen);
|
||||
}
|
||||
|
||||
static const void *
|
||||
fd_get_compiler_options(struct pipe_screen *pscreen, enum pipe_shader_ir ir,
|
||||
static const struct nir_shader_compiler_options *
|
||||
fd_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct fd_screen *screen = fd_screen(pscreen);
|
||||
|
|
|
|||
|
|
@ -175,11 +175,10 @@ static const struct nir_shader_compiler_options gallivm_nir_options = {
|
|||
.no_integers = true,
|
||||
};
|
||||
|
||||
static const void *
|
||||
i915_get_compiler_options(struct pipe_screen *pscreen, enum pipe_shader_ir ir,
|
||||
static const struct nir_shader_compiler_options *
|
||||
i915_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
if (shader == PIPE_SHADER_FRAGMENT)
|
||||
return &i915_compiler_options;
|
||||
else
|
||||
|
|
|
|||
|
|
@ -1362,9 +1362,9 @@ iris_fs_barycentric_modes(const struct iris_compiled_shader *shader,
|
|||
enum intel_msaa_flags pushed_msaa_flags);
|
||||
bool iris_use_tcs_multi_patch(struct iris_screen *screen);
|
||||
bool iris_indirect_ubos_use_sampler(struct iris_screen *screen);
|
||||
const void *iris_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type pstage);
|
||||
const struct nir_shader_compiler_options *
|
||||
iris_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_type pstage);
|
||||
|
||||
/* iris_disk_cache.c */
|
||||
|
||||
|
|
|
|||
|
|
@ -4013,14 +4013,12 @@ iris_shader_perf_log(void *data, unsigned *id, const char *fmt, ...)
|
|||
va_end(args);
|
||||
}
|
||||
|
||||
const void *
|
||||
const struct nir_shader_compiler_options *
|
||||
iris_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type pstage)
|
||||
{
|
||||
struct iris_screen *screen = (struct iris_screen *) pscreen;
|
||||
gl_shader_stage stage = stage_from_pipe(pstage);
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
|
||||
#ifdef INTEL_USE_ELK
|
||||
return screen->brw ? screen->brw->nir_options[stage]
|
||||
|
|
|
|||
|
|
@ -352,9 +352,8 @@ lima_screen_is_format_supported(struct pipe_screen *pscreen,
|
|||
return true;
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
lima_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
return lima_program_get_compiler_options(shader);
|
||||
|
|
|
|||
|
|
@ -482,12 +482,10 @@ llvmpipe_finalize_nir(struct pipe_screen *screen,
|
|||
}
|
||||
|
||||
|
||||
static inline const void *
|
||||
static inline const struct nir_shader_compiler_options *
|
||||
llvmpipe_get_compiler_options(struct pipe_screen *screen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
return &gallivm_nir_options;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -358,13 +358,11 @@ static const nir_shader_compiler_options nv30_base_compiler_options = {
|
|||
.no_integers = true,
|
||||
};
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
nv30_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct nv30_screen *screen = nv30_screen(pscreen);
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
|
||||
/* The FS compiler options are different between nv30 and nv40, and are set
|
||||
* up at screen creation time.
|
||||
|
|
|
|||
|
|
@ -697,14 +697,11 @@ int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space)
|
|||
return 1;
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
nv50_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
if (ir == PIPE_SHADER_IR_NIR)
|
||||
return nv50_ir_nir_shader_compiler_options(NVISA_G80_CHIPSET, shader);
|
||||
return NULL;
|
||||
return nv50_ir_nir_shader_compiler_options(NVISA_G80_CHIPSET, shader);
|
||||
}
|
||||
|
||||
struct nouveau_screen *
|
||||
|
|
|
|||
|
|
@ -756,15 +756,12 @@ nvc0_screen_bind_cb_3d(struct nvc0_screen *screen, struct nouveau_pushbuf *push,
|
|||
IMMED_NVC0(push, NVC0_3D(CB_BIND(stage)), (index << 4) | (size >= 0));
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
nvc0_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct nvc0_screen *screen = nvc0_screen(pscreen);
|
||||
if (ir == PIPE_SHADER_IR_NIR)
|
||||
return nv50_ir_nir_shader_compiler_options(screen->base.device->chipset, shader);
|
||||
return NULL;
|
||||
return nv50_ir_nir_shader_compiler_options(screen->base.device->chipset, shader);
|
||||
}
|
||||
|
||||
#define FAIL_SCREEN_INIT(str, err) \
|
||||
|
|
|
|||
|
|
@ -890,9 +890,8 @@ panfrost_destroy_screen(struct pipe_screen *pscreen)
|
|||
ralloc_free(pscreen);
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
return pan_shader_get_compiler_options(pan_screen(pscreen)->dev.arch);
|
||||
|
|
|
|||
|
|
@ -212,15 +212,12 @@ static const nir_shader_compiler_options gallivm_compiler_options = {
|
|||
.support_indirect_outputs = (uint8_t)BITFIELD_MASK(PIPE_SHADER_TYPES),
|
||||
};
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
r300_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct r300_screen* r300screen = r300_screen(pscreen);
|
||||
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
|
||||
if (shader == PIPE_SHADER_VERTEX && !r300screen->caps.has_tcl) {
|
||||
return &gallivm_compiler_options;
|
||||
} else if (r300screen->caps.is_r500) {
|
||||
|
|
|
|||
|
|
@ -933,13 +933,10 @@ struct pipe_resource *r600_resource_create_common(struct pipe_screen *screen,
|
|||
}
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
r600_get_compiler_options(struct pipe_screen *screen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
|
||||
struct r600_common_screen *rscreen = (struct r600_common_screen *)screen;
|
||||
return &rscreen->nir_options;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -138,10 +138,8 @@ int r600_pipe_shader_create(struct pipe_context *ctx,
|
|||
struct r600_pipe_shader_selector *sel = shader->selector;
|
||||
int r;
|
||||
const nir_shader_compiler_options *nir_options =
|
||||
(const nir_shader_compiler_options *)
|
||||
ctx->screen->get_compiler_options(ctx->screen,
|
||||
PIPE_SHADER_IR_NIR,
|
||||
shader->shader.processor_type);
|
||||
ctx->screen->get_compiler_options(ctx->screen,
|
||||
shader->shader.processor_type);
|
||||
if (!sel->nir && !(sel->ir_type == PIPE_SHADER_IR_TGSI)) {
|
||||
assert(sel->nir_blob);
|
||||
struct blob_reader blob_reader;
|
||||
|
|
|
|||
|
|
@ -1349,7 +1349,7 @@ void si_gfx_blit(struct pipe_context *ctx, const struct pipe_blit_info *info)
|
|||
fs = _mesa_hash_table_u64_search(sctx->ps_resolve_shaders, key.key);
|
||||
if (!fs) {
|
||||
struct ac_ps_resolve_options options = {
|
||||
.nir_options = sctx->b.screen->get_compiler_options(sctx->b.screen, PIPE_SHADER_IR_NIR,
|
||||
.nir_options = sctx->b.screen->get_compiler_options(sctx->b.screen,
|
||||
PIPE_SHADER_FRAGMENT),
|
||||
.info = &sctx->screen->info,
|
||||
.use_aco = sctx->screen->use_aco,
|
||||
|
|
|
|||
|
|
@ -56,12 +56,11 @@ si_is_compute_copy_faster(struct pipe_screen *pscreen,
|
|||
return false;
|
||||
}
|
||||
|
||||
static const void *si_get_compiler_options(struct pipe_screen *screen, enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
static const struct nir_shader_compiler_options *si_get_compiler_options(
|
||||
struct pipe_screen *screen, enum pipe_shader_type shader)
|
||||
{
|
||||
struct si_screen *sscreen = (struct si_screen *)screen;
|
||||
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
return sscreen->nir_options;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1188,7 +1188,7 @@ static void si_lower_ngg(struct si_shader *shader, nir_shader *nir,
|
|||
struct nir_shader *si_deserialize_shader(struct si_shader_selector *sel)
|
||||
{
|
||||
struct pipe_screen *screen = &sel->screen->b;
|
||||
const void *options = screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR, sel->stage);
|
||||
const void *options = screen->get_compiler_options(screen, sel->stage);
|
||||
|
||||
struct blob_reader blob_reader;
|
||||
blob_reader_init(&blob_reader, sel->nir_binary, sel->nir_size);
|
||||
|
|
|
|||
|
|
@ -98,12 +98,10 @@ static const nir_shader_compiler_options sp_compiler_options = {
|
|||
.support_indirect_outputs = (uint8_t)BITFIELD_MASK(PIPE_SHADER_TYPES),
|
||||
};
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
softpipe_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
return &sp_compiler_options;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -183,16 +183,13 @@ static const nir_shader_compiler_options svga_gl4_compiler_options = {
|
|||
VGPU10_OPTIONS,
|
||||
};
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
svga_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct svga_screen *svgascreen = svga_screen(pscreen);
|
||||
struct svga_winsys_screen *sws = svgascreen->sws;
|
||||
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
|
||||
if (sws->have_gl43 || sws->have_sm5)
|
||||
return &svga_gl4_compiler_options;
|
||||
else if (sws->have_vgpu10)
|
||||
|
|
|
|||
|
|
@ -407,16 +407,15 @@ tegra_screen_query_memory_info(struct pipe_screen *pscreen,
|
|||
screen->gpu->query_memory_info(screen->gpu, info);
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
tegra_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct tegra_screen *screen = to_tegra_screen(pscreen);
|
||||
const void *options = NULL;
|
||||
const struct nir_shader_compiler_options *options = NULL;
|
||||
|
||||
if (screen->gpu->get_compiler_options)
|
||||
options = screen->gpu->get_compiler_options(screen->gpu, ir, shader);
|
||||
options = screen->gpu->get_compiler_options(screen->gpu, shader);
|
||||
|
||||
return options;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -615,7 +615,6 @@ v3d_get_sand8_vs(struct pipe_context *pctx)
|
|||
|
||||
const struct nir_shader_compiler_options *options =
|
||||
pscreen->get_compiler_options(pscreen,
|
||||
PIPE_SHADER_IR_NIR,
|
||||
PIPE_SHADER_VERTEX);
|
||||
|
||||
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX,
|
||||
|
|
@ -664,7 +663,6 @@ v3d_get_sand8_fs(struct pipe_context *pctx, int cpp)
|
|||
|
||||
const struct nir_shader_compiler_options *options =
|
||||
pscreen->get_compiler_options(pscreen,
|
||||
PIPE_SHADER_IR_NIR,
|
||||
PIPE_SHADER_FRAGMENT);
|
||||
|
||||
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
|
||||
|
|
@ -896,7 +894,6 @@ v3d_get_sand30_vs(struct pipe_context *pctx)
|
|||
|
||||
const struct nir_shader_compiler_options *options =
|
||||
pscreen->get_compiler_options(pscreen,
|
||||
PIPE_SHADER_IR_NIR,
|
||||
PIPE_SHADER_VERTEX);
|
||||
|
||||
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX,
|
||||
|
|
@ -973,7 +970,6 @@ v3d_get_sand30_fs(struct pipe_context *pctx)
|
|||
|
||||
const struct nir_shader_compiler_options *options =
|
||||
pscreen->get_compiler_options(pscreen,
|
||||
PIPE_SHADER_IR_NIR,
|
||||
PIPE_SHADER_FRAGMENT);
|
||||
|
||||
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
|
||||
|
|
|
|||
|
|
@ -532,9 +532,8 @@ v3d_screen_is_format_supported(struct pipe_screen *pscreen,
|
|||
return true;
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
v3d_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct v3d_screen *screen = v3d_screen(pscreen);
|
||||
|
|
|
|||
|
|
@ -225,7 +225,6 @@ static void *vc4_get_yuv_vs(struct pipe_context *pctx)
|
|||
|
||||
const struct nir_shader_compiler_options *options =
|
||||
pscreen->get_compiler_options(pscreen,
|
||||
PIPE_SHADER_IR_NIR,
|
||||
PIPE_SHADER_VERTEX);
|
||||
|
||||
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_VERTEX, options,
|
||||
|
|
@ -266,7 +265,6 @@ static void *vc4_get_yuv_fs(struct pipe_context *pctx, int cpp)
|
|||
|
||||
const struct nir_shader_compiler_options *options =
|
||||
pscreen->get_compiler_options(pscreen,
|
||||
PIPE_SHADER_IR_NIR,
|
||||
PIPE_SHADER_FRAGMENT);
|
||||
|
||||
nir_builder b = nir_builder_init_simple_shader(MESA_SHADER_FRAGMENT,
|
||||
|
|
|
|||
|
|
@ -2185,9 +2185,8 @@ static const nir_shader_compiler_options nir_options = {
|
|||
.scalarize_ddx = true,
|
||||
};
|
||||
|
||||
const void *
|
||||
const struct nir_shader_compiler_options *
|
||||
vc4_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
return &nir_options;
|
||||
|
|
|
|||
|
|
@ -120,9 +120,8 @@ struct pipe_screen *vc4_screen_create(int fd,
|
|||
const struct pipe_screen_config *config,
|
||||
struct renderonly *ro);
|
||||
|
||||
const void *
|
||||
const struct nir_shader_compiler_options *
|
||||
vc4_screen_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader);
|
||||
|
||||
void
|
||||
|
|
|
|||
|
|
@ -974,9 +974,8 @@ fixup_renderer(union virgl_caps *caps)
|
|||
memcpy(caps->v2.renderer, renderer, renderer_len + 1);
|
||||
}
|
||||
|
||||
static const void *
|
||||
static const struct nir_shader_compiler_options *
|
||||
virgl_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader)
|
||||
{
|
||||
struct virgl_screen *vscreen = virgl_screen(pscreen);
|
||||
|
|
|
|||
|
|
@ -1363,12 +1363,10 @@ zink_screen_init_compiler(struct zink_screen *screen)
|
|||
screen->nir_options.support_indirect_outputs = (uint8_t)BITFIELD_MASK(PIPE_SHADER_TYPES);
|
||||
}
|
||||
|
||||
const void *
|
||||
const struct nir_shader_compiler_options *
|
||||
zink_get_compiler_options(struct pipe_screen *pscreen,
|
||||
enum pipe_shader_ir ir,
|
||||
gl_shader_stage shader)
|
||||
{
|
||||
assert(ir == PIPE_SHADER_IR_NIR);
|
||||
return &zink_screen(pscreen)->nir_options;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -49,9 +49,8 @@ clamp_stage(const shader_info *info)
|
|||
return info->stage == MESA_SHADER_KERNEL ? MESA_SHADER_COMPUTE : info->stage;
|
||||
}
|
||||
|
||||
const void *
|
||||
const struct nir_shader_compiler_options *
|
||||
zink_get_compiler_options(struct pipe_screen *screen,
|
||||
enum pipe_shader_ir ir,
|
||||
gl_shader_stage shader);
|
||||
|
||||
struct nir_shader *
|
||||
|
|
|
|||
|
|
@ -1309,7 +1309,7 @@ lvp_physical_device_init(struct lvp_physical_device *device,
|
|||
if (!device->pscreen)
|
||||
return vk_error(instance, VK_ERROR_OUT_OF_HOST_MEMORY);
|
||||
for (unsigned i = 0; i < ARRAY_SIZE(device->drv_options); i++)
|
||||
device->drv_options[i] = device->pscreen->get_compiler_options(device->pscreen, PIPE_SHADER_IR_NIR, i);
|
||||
device->drv_options[i] = device->pscreen->get_compiler_options(device->pscreen, i);
|
||||
|
||||
device->sync_timeline_type = vk_sync_timeline_get_type(&lvp_pipe_sync_type);
|
||||
device->sync_types[0] = &lvp_pipe_sync_type;
|
||||
|
|
|
|||
|
|
@ -1185,7 +1185,7 @@ create_shader_object(struct lvp_device *device, const VkShaderCreateInfoEXT *pCr
|
|||
return VK_NULL_HANDLE;
|
||||
|
||||
blob_reader_init(&blob, data + SHA1_DIGEST_LENGTH + VK_UUID_SIZE, size);
|
||||
nir = nir_deserialize(NULL, device->pscreen->get_compiler_options(device->pscreen, PIPE_SHADER_IR_NIR, stage), &blob);
|
||||
nir = nir_deserialize(NULL, device->pscreen->get_compiler_options(device->pscreen, stage), &blob);
|
||||
if (!nir)
|
||||
goto fail;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1044,7 +1044,7 @@ lvp_compile_ray_tracing_pipeline(struct lvp_pipeline *pipeline,
|
|||
{
|
||||
nir_builder _b = nir_builder_init_simple_shader(
|
||||
MESA_SHADER_COMPUTE,
|
||||
pipeline->device->pscreen->get_compiler_options(pipeline->device->pscreen, PIPE_SHADER_IR_NIR, MESA_SHADER_COMPUTE),
|
||||
pipeline->device->pscreen->get_compiler_options(pipeline->device->pscreen, MESA_SHADER_COMPUTE),
|
||||
"ray tracing pipeline");
|
||||
nir_builder *b = &_b;
|
||||
|
||||
|
|
|
|||
|
|
@ -414,14 +414,7 @@ impl PipeScreen {
|
|||
&self,
|
||||
shader: pipe_shader_type,
|
||||
) -> *const nir_shader_compiler_options {
|
||||
unsafe {
|
||||
self.screen().get_compiler_options.unwrap()(
|
||||
self.screen.as_ptr(),
|
||||
pipe_shader_ir::PIPE_SHADER_IR_NIR,
|
||||
shader,
|
||||
)
|
||||
.cast()
|
||||
}
|
||||
unsafe { self.screen().get_compiler_options.unwrap()(self.screen.as_ptr(), shader) }
|
||||
}
|
||||
|
||||
pub fn shader_cache(&self) -> Option<DiskCacheBorrowed> {
|
||||
|
|
|
|||
|
|
@ -68,6 +68,7 @@ struct pipe_screen;
|
|||
struct util_queue_fence;
|
||||
struct pipe_video_buffer;
|
||||
struct nir_shader;
|
||||
struct nir_shader_compiler_options;
|
||||
|
||||
typedef struct pipe_vertex_state *
|
||||
(*pipe_create_vertex_state_func)(struct pipe_screen *screen,
|
||||
|
|
@ -467,13 +468,10 @@ struct pipe_screen {
|
|||
struct pipe_memory_info *info);
|
||||
|
||||
/**
|
||||
* Get IR specific compiler options struct. For PIPE_SHADER_IR_NIR this
|
||||
* returns a 'struct nir_shader_compiler_options'. Drivers reporting
|
||||
* NIR as the preferred IR must implement this.
|
||||
* Get nir compiler options struct.
|
||||
*/
|
||||
const void *(*get_compiler_options)(struct pipe_screen *screen,
|
||||
enum pipe_shader_ir ir,
|
||||
enum pipe_shader_type shader);
|
||||
const struct nir_shader_compiler_options *(*get_compiler_options)(
|
||||
struct pipe_screen *screen, enum pipe_shader_type shader);
|
||||
|
||||
/**
|
||||
* Returns a pointer to a driver-specific on-disk shader cache. If the
|
||||
|
|
|
|||
|
|
@ -206,7 +206,7 @@ void st_init_limits(struct pipe_screen *screen,
|
|||
struct gl_program_constants *pc = &c->Program[stage];
|
||||
|
||||
if (screen->get_compiler_options)
|
||||
options->NirOptions = screen->get_compiler_options(screen, PIPE_SHADER_IR_NIR, sh);
|
||||
options->NirOptions = screen->get_compiler_options(screen, sh);
|
||||
|
||||
if (!options->NirOptions) {
|
||||
options->NirOptions =
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue