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i965: Always set tiling for depth buffer on sandybridge

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Sandybridge only support tiling depth buffer, always set tiling bit.

Fix 'fbo_firecube' demo.
This commit is contained in:
Zhenyu Wang 2010-09-29 13:59:03 +08:00
parent 28b57c56e2
commit 0a1910c267
1 changed files with 1 additions and 1 deletions
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2
src/mesa/drivers/dri/i965/brw_misc_state.c
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@ -289,7 +289,7 @@ static void emit_depthbuffer(struct brw_context *brw)
OUT_BATCH(((region->pitch * region->cpp) - 1) |
(format << 18) |
(BRW_TILEWALK_YMAJOR << 26) |
((region->tiling != I915_TILING_NONE) << 27) |
(1 << 27) |
(BRW_SURFACE_2D << 29));
OUT_RELOC(region->buffer,
I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER,