mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-02-26 09:10:31 +01:00
nak: Rename resident to fault
The predicate returns true if the requisite pixels are NOT resident. Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/26719>
This commit is contained in:
parent
48803ac53d
commit
09e2917ee8
4 changed files with 22 additions and 22 deletions
|
|
@ -1087,7 +1087,7 @@ impl SM50Instr {
|
|||
|
||||
self.set_dst(op.dsts[0]);
|
||||
assert!(op.dsts[1].is_none());
|
||||
assert!(op.resident.is_none());
|
||||
assert!(op.fault.is_none());
|
||||
self.set_reg_src(8..16, op.srcs[0]);
|
||||
self.set_reg_src(20..28, op.srcs[1]);
|
||||
|
||||
|
|
@ -1105,7 +1105,7 @@ impl SM50Instr {
|
|||
|
||||
self.set_dst(op.dsts[0]);
|
||||
assert!(op.dsts[1].is_none());
|
||||
assert!(op.resident.is_none());
|
||||
assert!(op.fault.is_none());
|
||||
self.set_reg_src(8..16, op.srcs[0]);
|
||||
self.set_reg_src(20..28, op.srcs[1]);
|
||||
|
||||
|
|
@ -1126,7 +1126,7 @@ impl SM50Instr {
|
|||
|
||||
self.set_dst(op.dsts[0]);
|
||||
assert!(op.dsts[1].is_none());
|
||||
assert!(op.resident.is_none());
|
||||
assert!(op.fault.is_none());
|
||||
self.set_reg_src(8..16, op.srcs[0]);
|
||||
self.set_reg_src(20..28, op.srcs[1]);
|
||||
|
||||
|
|
@ -1165,7 +1165,7 @@ impl SM50Instr {
|
|||
|
||||
self.set_dst(op.dsts[0]);
|
||||
assert!(op.dsts[1].is_none());
|
||||
assert!(op.resident.is_none());
|
||||
assert!(op.fault.is_none());
|
||||
self.set_reg_src(8..16, op.srcs[0]);
|
||||
self.set_reg_src(20..28, op.srcs[1]);
|
||||
|
||||
|
|
|
|||
|
|
@ -1149,7 +1149,7 @@ impl SM70Instr {
|
|||
} else {
|
||||
self.set_field(64..72, 255_u8);
|
||||
}
|
||||
self.set_pred_dst(81..84, op.resident);
|
||||
self.set_pred_dst(81..84, op.fault);
|
||||
|
||||
self.set_reg_src(24..32, op.srcs[0]);
|
||||
self.set_reg_src(32..40, op.srcs[1]);
|
||||
|
|
@ -1174,7 +1174,7 @@ impl SM70Instr {
|
|||
} else {
|
||||
self.set_field(64..72, 255_u8);
|
||||
}
|
||||
self.set_pred_dst(81..84, op.resident);
|
||||
self.set_pred_dst(81..84, op.fault);
|
||||
|
||||
self.set_reg_src(24..32, op.srcs[0]);
|
||||
self.set_reg_src(32..40, op.srcs[1]);
|
||||
|
|
@ -1202,7 +1202,7 @@ impl SM70Instr {
|
|||
} else {
|
||||
self.set_field(64..72, 255_u8);
|
||||
}
|
||||
self.set_pred_dst(81..84, op.resident);
|
||||
self.set_pred_dst(81..84, op.fault);
|
||||
|
||||
self.set_reg_src(24..32, op.srcs[0]);
|
||||
self.set_reg_src(32..40, op.srcs[1]);
|
||||
|
|
@ -1254,7 +1254,7 @@ impl SM70Instr {
|
|||
} else {
|
||||
self.set_field(64..72, 255_u8);
|
||||
}
|
||||
self.set_pred_dst(81..84, op.resident);
|
||||
self.set_pred_dst(81..84, op.fault);
|
||||
|
||||
self.set_reg_src(24..32, op.srcs[0]);
|
||||
self.set_reg_src(32..40, op.srcs[1]);
|
||||
|
|
@ -1361,7 +1361,7 @@ impl SM70Instr {
|
|||
self.set_dst(op.dst);
|
||||
self.set_reg_src(24..32, op.coord);
|
||||
self.set_reg_src(64..72, op.handle);
|
||||
self.set_pred_dst(81..84, op.resident);
|
||||
self.set_pred_dst(81..84, op.fault);
|
||||
|
||||
self.set_image_dim(61..64, op.image_dim);
|
||||
self.set_mem_order(&op.mem_order);
|
||||
|
|
@ -1397,7 +1397,7 @@ impl SM70Instr {
|
|||
self.set_reg_src(24..32, op.coord);
|
||||
self.set_reg_src(32..40, op.data);
|
||||
self.set_reg_src(64..72, op.handle);
|
||||
self.set_pred_dst(81..84, op.resident);
|
||||
self.set_pred_dst(81..84, op.fault);
|
||||
|
||||
self.set_image_dim(61..64, op.image_dim);
|
||||
self.set_mem_order(&op.mem_order);
|
||||
|
|
|
|||
|
|
@ -1622,7 +1622,7 @@ impl<'a> ShaderFromNir<'a> {
|
|||
assert!(!flags.has_z_cmpr());
|
||||
b.push_op(OpTxd {
|
||||
dsts: dsts,
|
||||
resident: Dst::None,
|
||||
fault: Dst::None,
|
||||
srcs: srcs,
|
||||
dim: dim,
|
||||
offset: offset_mode == Tld4OffsetMode::AddOffI,
|
||||
|
|
@ -1640,7 +1640,7 @@ impl<'a> ShaderFromNir<'a> {
|
|||
assert!(offset_mode != Tld4OffsetMode::PerPx);
|
||||
b.push_op(OpTld {
|
||||
dsts: dsts,
|
||||
resident: Dst::None,
|
||||
fault: Dst::None,
|
||||
srcs: srcs,
|
||||
dim: dim,
|
||||
lod_mode: lod_mode,
|
||||
|
|
@ -1651,7 +1651,7 @@ impl<'a> ShaderFromNir<'a> {
|
|||
} else if tex.op == nir_texop_tg4 {
|
||||
b.push_op(OpTld4 {
|
||||
dsts: dsts,
|
||||
resident: Dst::None,
|
||||
fault: Dst::None,
|
||||
srcs: srcs,
|
||||
dim: dim,
|
||||
comp: tex.component().try_into().unwrap(),
|
||||
|
|
@ -1663,7 +1663,7 @@ impl<'a> ShaderFromNir<'a> {
|
|||
assert!(offset_mode != Tld4OffsetMode::PerPx);
|
||||
b.push_op(OpTex {
|
||||
dsts: dsts,
|
||||
resident: Dst::None,
|
||||
fault: Dst::None,
|
||||
srcs: srcs,
|
||||
dim: dim,
|
||||
lod_mode: lod_mode,
|
||||
|
|
@ -1988,7 +1988,7 @@ impl<'a> ShaderFromNir<'a> {
|
|||
|
||||
b.push_op(OpSuAtom {
|
||||
dst: dst.into(),
|
||||
resident: Dst::None,
|
||||
fault: Dst::None,
|
||||
handle: handle,
|
||||
coord: coord,
|
||||
data: data,
|
||||
|
|
@ -2015,7 +2015,7 @@ impl<'a> ShaderFromNir<'a> {
|
|||
|
||||
b.push_op(OpSuLd {
|
||||
dst: dst.into(),
|
||||
resident: Dst::None,
|
||||
fault: Dst::None,
|
||||
image_dim: dim,
|
||||
mem_order: MemOrder::Strong(MemScope::System),
|
||||
mem_eviction_priority: self
|
||||
|
|
|
|||
|
|
@ -3530,7 +3530,7 @@ impl_display_for_op!(OpPopC);
|
|||
#[derive(SrcsAsSlice, DstsAsSlice)]
|
||||
pub struct OpTex {
|
||||
pub dsts: [Dst; 2],
|
||||
pub resident: Dst,
|
||||
pub fault: Dst,
|
||||
|
||||
#[src_type(SSA)]
|
||||
pub srcs: [Src; 2],
|
||||
|
|
@ -3563,7 +3563,7 @@ impl_display_for_op!(OpTex);
|
|||
#[derive(SrcsAsSlice, DstsAsSlice)]
|
||||
pub struct OpTld {
|
||||
pub dsts: [Dst; 2],
|
||||
pub resident: Dst,
|
||||
pub fault: Dst,
|
||||
|
||||
#[src_type(SSA)]
|
||||
pub srcs: [Src; 2],
|
||||
|
|
@ -3596,7 +3596,7 @@ impl_display_for_op!(OpTld);
|
|||
#[derive(SrcsAsSlice, DstsAsSlice)]
|
||||
pub struct OpTld4 {
|
||||
pub dsts: [Dst; 2],
|
||||
pub resident: Dst,
|
||||
pub fault: Dst,
|
||||
|
||||
#[src_type(SSA)]
|
||||
pub srcs: [Src; 2],
|
||||
|
|
@ -3646,7 +3646,7 @@ impl_display_for_op!(OpTmml);
|
|||
#[derive(SrcsAsSlice, DstsAsSlice)]
|
||||
pub struct OpTxd {
|
||||
pub dsts: [Dst; 2],
|
||||
pub resident: Dst,
|
||||
pub fault: Dst,
|
||||
|
||||
#[src_type(SSA)]
|
||||
pub srcs: [Src; 2],
|
||||
|
|
@ -3690,7 +3690,7 @@ impl_display_for_op!(OpTxq);
|
|||
#[derive(SrcsAsSlice, DstsAsSlice)]
|
||||
pub struct OpSuLd {
|
||||
pub dst: Dst,
|
||||
pub resident: Dst,
|
||||
pub fault: Dst,
|
||||
|
||||
pub image_dim: ImageDim,
|
||||
pub mem_order: MemOrder,
|
||||
|
|
@ -3757,7 +3757,7 @@ impl_display_for_op!(OpSuSt);
|
|||
#[derive(SrcsAsSlice, DstsAsSlice)]
|
||||
pub struct OpSuAtom {
|
||||
pub dst: Dst,
|
||||
pub resident: Dst,
|
||||
pub fault: Dst,
|
||||
|
||||
pub image_dim: ImageDim,
|
||||
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue