From 09b5e2a78612e148f6600443f10d14ae90e9c86f Mon Sep 17 00:00:00 2001
From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Date: Wed, 7 Jun 2023 07:59:26 -0400
Subject: [PATCH] vtn: Handle atomic counter semantics

This can happen for GLSL-environment SPIR-V.

Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Suggested-by: Caio Oliveira <caio.oliveira@intel.com>
Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Reviewed-by: Jesse Natalie <jenatali@microsoft.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/23191>
---
 src/compiler/spirv/spirv_to_nir.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index b594a6e496f..91cbb8dbb18 100644
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2569,6 +2569,13 @@ vtn_mem_semantics_to_nir_var_modes(struct vtn_builder *b,
          modes |= nir_var_mem_task_payload;
    }
 
+   if (semantics & SpvMemorySemanticsAtomicCounterMemoryMask) {
+      /* There's no nir_var_atomic_counter, but since atomic counters are
+       * lowered to SSBOs, we use nir_var_mem_ssbo instead.
+       */
+      modes |= nir_var_mem_ssbo;
+   }
+
    return modes;
 }