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radeonsi: separate 2 pieces of code from create_function
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
parent
292759220c
commit
09408764c1
1 changed files with 51 additions and 31 deletions
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@ -3554,6 +3554,30 @@ static const struct lp_build_tgsi_action interp_action = {
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.emit = build_interp_intrinsic,
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};
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static void si_create_function(struct si_shader_context *ctx,
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LLVMTypeRef *returns, unsigned num_returns,
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LLVMTypeRef *params, unsigned num_params,
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int last_array_pointer, int last_sgpr)
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{
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int i;
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radeon_llvm_create_func(&ctx->radeon_bld, returns, num_returns,
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params, num_params);
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radeon_llvm_shader_type(ctx->radeon_bld.main_fn, ctx->type);
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ctx->return_value = LLVMGetUndef(ctx->radeon_bld.return_type);
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for (i = 0; i <= last_sgpr; ++i) {
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LLVMValueRef P = LLVMGetParam(ctx->radeon_bld.main_fn, i);
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/* We tell llvm that array inputs are passed by value to allow Sinking pass
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* to move load. Inputs are constant so this is fine. */
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if (i <= last_array_pointer)
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LLVMAddAttribute(P, LLVMByValAttribute);
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else
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LLVMAddAttribute(P, LLVMInRegAttribute);
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}
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}
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static void create_meta_data(struct si_shader_context *ctx)
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{
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struct gallivm_state *gallivm = ctx->radeon_bld.soa.bld_base.base.gallivm;
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@ -3607,6 +3631,27 @@ static unsigned llvm_get_type_size(LLVMTypeRef type)
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}
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}
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static void declare_tess_lds(struct si_shader_context *ctx)
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{
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struct gallivm_state *gallivm = &ctx->radeon_bld.gallivm;
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LLVMTypeRef i32 = ctx->radeon_bld.soa.bld_base.uint_bld.elem_type;
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/* This is the upper bound, maximum is 32 inputs times 32 vertices */
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unsigned vertex_data_dw_size = 32*32*4;
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unsigned patch_data_dw_size = 32*4;
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/* The formula is: TCS inputs + TCS outputs + TCS patch outputs. */
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unsigned patch_dw_size = vertex_data_dw_size*2 + patch_data_dw_size;
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unsigned lds_dwords = patch_dw_size;
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/* The actual size is computed outside of the shader to reduce
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* the number of shader variants. */
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ctx->lds =
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LLVMAddGlobalInAddressSpace(gallivm->module,
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LLVMArrayType(i32, lds_dwords),
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"tess_lds",
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LOCAL_ADDR_SPACE);
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}
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static void create_function(struct si_shader_context *ctx)
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{
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struct lp_build_tgsi_context *bld_base = &ctx->radeon_bld.soa.bld_base;
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@ -3739,26 +3784,15 @@ static void create_function(struct si_shader_context *ctx)
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}
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assert(num_params <= Elements(params));
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radeon_llvm_create_func(&ctx->radeon_bld, NULL, 0,
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params, num_params);
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radeon_llvm_shader_type(ctx->radeon_bld.main_fn, ctx->type);
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ctx->return_value = LLVMGetUndef(ctx->radeon_bld.return_type);
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si_create_function(ctx, NULL, 0, params,
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num_params, last_array_pointer, last_sgpr);
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shader->num_input_sgprs = 0;
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shader->num_input_vgprs = 0;
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for (i = 0; i <= last_sgpr; ++i) {
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LLVMValueRef P = LLVMGetParam(ctx->radeon_bld.main_fn, i);
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/* We tell llvm that array inputs are passed by value to allow Sinking pass
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* to move load. Inputs are constant so this is fine. */
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if (i <= last_array_pointer)
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LLVMAddAttribute(P, LLVMByValAttribute);
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else
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LLVMAddAttribute(P, LLVMInRegAttribute);
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for (i = 0; i <= last_sgpr; ++i)
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shader->num_input_sgprs += llvm_get_type_size(params[i]) / 4;
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}
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/* Unused fragment shader inputs are eliminated by the compiler,
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* so we don't know yet how many there will be.
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@ -3782,22 +3816,8 @@ static void create_function(struct si_shader_context *ctx)
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if ((ctx->type == TGSI_PROCESSOR_VERTEX && shader->key.vs.as_ls) ||
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ctx->type == TGSI_PROCESSOR_TESS_CTRL ||
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ctx->type == TGSI_PROCESSOR_TESS_EVAL) {
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/* This is the upper bound, maximum is 32 inputs times 32 vertices */
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unsigned vertex_data_dw_size = 32*32*4;
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unsigned patch_data_dw_size = 32*4;
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/* The formula is: TCS inputs + TCS outputs + TCS patch outputs. */
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unsigned patch_dw_size = vertex_data_dw_size*2 + patch_data_dw_size;
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unsigned lds_dwords = patch_dw_size;
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/* The actual size is computed outside of the shader to reduce
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* the number of shader variants. */
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ctx->lds =
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LLVMAddGlobalInAddressSpace(gallivm->module,
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LLVMArrayType(ctx->i32, lds_dwords),
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"tess_lds",
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LOCAL_ADDR_SPACE);
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}
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ctx->type == TGSI_PROCESSOR_TESS_EVAL)
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declare_tess_lds(ctx);
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}
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static void preload_constants(struct si_shader_context *ctx)
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