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nil: Add zcull support
Reviewed-by: Mary Guillemard <mary@mary.zone> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/33861>
This commit is contained in:
parent
88cc4df9a3
commit
0920e0afb5
5 changed files with 308 additions and 0 deletions
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@ -66,6 +66,7 @@ void vk_push_print(FILE *fp, const struct nv_push *push,
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const struct nv_device_info *devinfo) ATTRIBUTE_COLD;
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const struct nv_device_info *devinfo) ATTRIBUTE_COLD;
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#define SUBC_NV9097 0
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#define SUBC_NV9097 0
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#define SUBC_NV9297 0
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#define SUBC_NVA097 0
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#define SUBC_NVA097 0
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#define SUBC_NVB097 0
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#define SUBC_NVB097 0
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#define SUBC_NVB197 0
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#define SUBC_NVB197 0
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@ -14,6 +14,7 @@ renaming_overrides_prefixing = true
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# See https://github.com/mozilla/cbindgen/issues/621
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# See https://github.com/mozilla/cbindgen/issues/621
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[export.rename]
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[export.rename]
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"nv_device_info" = "struct nv_device_info"
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"nv_device_info" = "struct nv_device_info"
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"nv_zcull_device_info" = "struct nv_zcull_device_info"
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"pipe_format" = "enum pipe_format"
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"pipe_format" = "enum pipe_format"
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"pipe_swizzle" = "enum pipe_swizzle"
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"pipe_swizzle" = "enum pipe_swizzle"
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"MAX_LEVELS" = "NIL_MAX_LEVELS"
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"MAX_LEVELS" = "NIL_MAX_LEVELS"
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@ -35,6 +36,7 @@ renaming_overrides_prefixing = true
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"View" = "nil_view"
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"View" = "nil_view"
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"ViewAccess" = "nil_view_access"
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"ViewAccess" = "nil_view_access"
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"ViewType" = "nil_view_type"
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"ViewType" = "nil_view_type"
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"ZCull" = "nil_zcull"
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# There's just no good solution for this one
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# There's just no good solution for this one
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"ImageUsageFlags" = "nil_image_usage_flags"
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"ImageUsageFlags" = "nil_image_usage_flags"
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@ -12,6 +12,7 @@ mod image;
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mod modifiers;
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mod modifiers;
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mod su_info;
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mod su_info;
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mod tiling;
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mod tiling;
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mod zcull;
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pub trait ILog2Ceil {
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pub trait ILog2Ceil {
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fn ilog2_ceil(self) -> Self;
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fn ilog2_ceil(self) -> Self;
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@ -57,6 +57,7 @@ _nil_bindings_rs = rust.bindgen(
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'--allowlist-type', 'nil_format_support_flags',
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'--allowlist-type', 'nil_format_support_flags',
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'--allowlist-type', 'nv_device_info',
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'--allowlist-type', 'nv_device_info',
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'--allowlist-type', 'nv_device_type',
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'--allowlist-type', 'nv_device_type',
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'--allowlist-type', 'nv_zcull_device_info',
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'--allowlist-type', 'pipe_format',
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'--allowlist-type', 'pipe_format',
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'--allowlist-type', 'pipe_swizzle',
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'--allowlist-type', 'pipe_swizzle',
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'--allowlist-var', 'nil_format_table',
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'--allowlist-var', 'nil_format_table',
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@ -84,6 +85,20 @@ _libnil = static_library(
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dependencies: _libnil_deps,
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dependencies: _libnil_deps,
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)
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)
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# TODO: Linking Rust executables (such as unit tests) doesn't play nicely
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# with the sanitizers because meson doesn't know to pass -fsanitize to the
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# Rust linker. See also https://github.com/mesonbuild/meson/issues/11741
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if with_tests and get_option('b_sanitize') == 'none'
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rust.test(
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'nil',
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_libnil,
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suite : ['nouveau'],
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# This is needed to ensure we link against glibc
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# See also https://gitlab.freedesktop.org/mesa/mesa/-/issues/11632
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rust_args: ['-C', 'default-linker-libraries'],
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)
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endif
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_nil_h = custom_target(
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_nil_h = custom_target(
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'nil_h',
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'nil_h',
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input : [files('cbindgen.toml'), 'lib.rs'],
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input : [files('cbindgen.toml'), 'lib.rs'],
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289
src/nouveau/nil/zcull.rs
Normal file
289
src/nouveau/nil/zcull.rs
Normal file
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@ -0,0 +1,289 @@
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// Copyright © 2025 Valve Corporation
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// SPDX-License-Identifier: MIT
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use crate::nvidia_headers::Mthd;
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use nil_rs_bindings::*;
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use nvidia_headers::classes::cl9297::mthd::{
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AssignZcullSubregionsAlgorithm, SetZcullRegionFormatType,
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SetZcullSubregionAllocation, SetZcullSubregionAllocationFormat,
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};
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pub const MAX_SUBREGIONS: usize = 16;
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fn prev_multiple_of(x: u32, y: u32) -> u32 {
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(x / y) * y
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}
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#[repr(C)]
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#[derive(Clone, Debug, PartialEq)]
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pub struct ZCull {
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pub x: u32,
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pub y: u32,
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pub width: u32,
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pub height: u32,
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pub size_B: u32,
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pub align_B: u32,
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pub region_format: u16, // SetZcullRegionFormatType
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pub normalized_aliquots: u32,
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pub aliquot_count: u32,
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pub subregions: [u32; MAX_SUBREGIONS],
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pub subregion_count: u32,
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pub subregion_algorithm: u16, // AssignZcullSubregionsAlgorithm
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}
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impl ZCull {
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#[no_mangle]
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pub extern "C" fn nil_zcull_new(
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dev: &nv_zcull_device_info,
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x: u32,
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y: u32,
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width: u32,
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height: u32,
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) -> Self {
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Self::new(dev, x, y, width, height)
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}
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pub fn new(
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dev_info: &nv_zcull_device_info,
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x: u32,
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y: u32,
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width: u32,
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height: u32,
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) -> Self {
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// Align region
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let x_align: u32 = dev_info.subregion_width_align_pixels;
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let y_align: u32 = dev_info.subregion_height_align_pixels;
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let x0 = prev_multiple_of(x, x_align);
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let x1 = (x + width).next_multiple_of(x_align);
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let y0 = prev_multiple_of(y, y_align);
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let y1 = (y + height).next_multiple_of(y_align);
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let x = x0;
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let y = y0;
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let width: u64 = (x1 - x0).into();
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let height: u64 = (y1 - y0).into();
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// This is based on the heuristic reverse engineered here:
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// https://gitlab.freedesktop.org/mhenning/re/-/blob/main/zcull_fb_size/heuristic.py
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// Our heuristic doesn't match the proprietary diver exactly but it's
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// pretty close
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let normalized_aliquots_per_region = (width * height)
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.div_ceil(dev_info.pixel_squares_by_aliquots.into())
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.div_ceil(dev_info.subregion_count.into());
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let normalized_aliquots = normalized_aliquots_per_region
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* u64::from(dev_info.subregion_count);
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assert!(dev_info.subregion_count <= MAX_SUBREGIONS.try_into().unwrap());
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let mut subregion_aliquots = [0; MAX_SUBREGIONS];
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let mut subregion_format =
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[SetZcullSubregionAllocationFormat::None; MAX_SUBREGIONS];
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let mut subregions = [0; MAX_SUBREGIONS];
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let format_priorities = [
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(SetZcullSubregionAllocationFormat::Z4x8_2x2, 8),
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(SetZcullSubregionAllocationFormat::Z8x8_4x2, 4),
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(SetZcullSubregionAllocationFormat::Z16x16_4x2, 2),
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(SetZcullSubregionAllocationFormat::Z16x16x2_4x4, 1),
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];
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let mut remaining_aliquots: u64 = dev_info.aliquot_total.into();
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for i in (0..usize::try_from(dev_info.subregion_count).unwrap()).rev() {
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for (fmt, factor) in format_priorities {
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let aliquot_count =
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(factor * normalized_aliquots_per_region).div_ceil(2);
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let aliquot_count_all =
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u64::try_from(i + 1).unwrap() * aliquot_count;
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if aliquot_count_all <= remaining_aliquots {
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subregion_aliquots[i] = aliquot_count;
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subregion_format[i] = fmt;
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remaining_aliquots -= subregion_aliquots[i];
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break;
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}
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}
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subregions[i] = SetZcullSubregionAllocation {
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subregion_id: i.try_into().unwrap(),
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aliquots: subregion_aliquots[i].try_into().unwrap(),
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format: subregion_format[i],
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}
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.to_bits();
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}
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let region_format = SetZcullRegionFormatType::Z4x4;
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let aliquot_count: u64 = subregion_aliquots.iter().sum();
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let mut subregion_algorithm = AssignZcullSubregionsAlgorithm::Static;
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for i in 1..usize::try_from(dev_info.subregion_count).unwrap() {
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if subregion_format[0] != subregion_format[i] {
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subregion_algorithm = AssignZcullSubregionsAlgorithm::Adaptive;
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}
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}
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let aliquot_count = u32::try_from(aliquot_count).unwrap();
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assert!(aliquot_count <= dev_info.aliquot_total);
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let size_B = aliquot_count * dev_info.zcull_region_byte_multiplier
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+ dev_info.zcull_region_header_size
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+ dev_info.zcull_subregion_header_size;
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ZCull {
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x,
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y,
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width: width.try_into().unwrap(),
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height: height.try_into().unwrap(),
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size_B,
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align_B: 0x400, // TODO: Can this be smaller?
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region_format: region_format as u16,
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normalized_aliquots: normalized_aliquots.try_into().unwrap(),
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aliquot_count,
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subregions,
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subregion_count: dev_info.subregion_count,
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subregion_algorithm: subregion_algorithm as u16,
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}
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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const REFERENCE_DEV_INFO: nv_zcull_device_info = nv_zcull_device_info {
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width_align_pixels: 224,
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height_align_pixels: 32,
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pixel_squares_by_aliquots: 3584,
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aliquot_total: 5120,
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zcull_region_byte_multiplier: 128,
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zcull_region_header_size: 224,
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zcull_subregion_header_size: 1344,
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subregion_count: 16,
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subregion_width_align_pixels: 224,
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subregion_height_align_pixels: 64,
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ctxsw_size: 657408,
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ctxsw_align: 4096,
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};
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fn check_subregions(zcull: &ZCull, expected_subregion_data: &[u32]) {
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assert_eq!(
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usize::try_from(zcull.subregion_count).unwrap() * 2,
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expected_subregion_data.len(),
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);
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for (i, item) in expected_subregion_data.chunks_exact(2).enumerate() {
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let subregion_aliquots = item[0];
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let subregion_format = u16::try_from(item[1]).unwrap();
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let subregion_format: SetZcullSubregionAllocationFormat =
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unsafe { std::mem::transmute(subregion_format) };
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let expected = SetZcullSubregionAllocation {
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subregion_id: i.try_into().unwrap(),
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aliquots: subregion_aliquots,
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format: subregion_format,
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}
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.to_bits();
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// For Adaptive, our current region assignment heuristic differs
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// slightly from the proprietary driver, so only check equivalence
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// for Static
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if zcull.subregion_algorithm
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== AssignZcullSubregionsAlgorithm::Static as u16
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{
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assert_eq!(zcull.subregions[i], expected);
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}
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}
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}
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fn check_reference(data: [u32; 5 + 16 * 2]) {
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let [width, height, aliquot_count, normalized_aliquots, subregion_algorithm, expected_subregion_data @ ..] =
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data;
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let zcull =
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ZCull::new(&REFERENCE_DEV_INFO, 0, 0, width.into(), height.into());
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assert_eq!(zcull.aliquot_count, aliquot_count);
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assert_eq!(zcull.normalized_aliquots, normalized_aliquots);
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assert_eq!(u32::from(zcull.subregion_algorithm), subregion_algorithm);
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check_subregions(&zcull, &expected_subregion_data);
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}
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macro_rules! test_data {
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{
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$(
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$w:literal, $h:literal, "Z_4X4", $($i:literal),* ;
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)*
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}
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=> {
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#[test]
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fn test_reference() {
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$(
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check_reference([ $w, $h, $($i),* ]);
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)*
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}
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}
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}
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// This data is dumped from the proprietary driver by running a simple
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// vulkan app and analyzing the command buffers it submits
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// See https://gitlab.freedesktop.org/mhenning/re/-/blob/main/zcull_fb_size/collect_data.py
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test_data! {
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224,32,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
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224,64,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
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224,128,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
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224,256,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
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224,512,"Z_4X4",128,32,0,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8;
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224,1024,"Z_4X4",256,64,0,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8;
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224,2048,"Z_4X4",512,128,0,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8;
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224,4096,"Z_4X4",1024,256,0,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8;
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224,8192,"Z_4X4",2048,512,0,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8;
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224,16384,"Z_4X4",4096,1024,0,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8;
|
||||||
|
448,32,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
|
||||||
|
448,64,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
|
||||||
|
448,128,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
|
||||||
|
448,256,"Z_4X4",128,32,0,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8;
|
||||||
|
448,512,"Z_4X4",256,64,0,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8;
|
||||||
|
448,1024,"Z_4X4",512,128,0,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8;
|
||||||
|
448,2048,"Z_4X4",1024,256,0,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8;
|
||||||
|
448,4096,"Z_4X4",2048,512,0,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8;
|
||||||
|
448,8192,"Z_4X4",4096,1024,0,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8;
|
||||||
|
448,16384,"Z_4X4",5120,2048,1,512,8,512,8,512,8,512,8,512,8,512,8,512,8,256,5,256,5,256,5,256,5,128,2,128,2,128,2,64,0,64,0;
|
||||||
|
896,32,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
|
||||||
|
896,64,"Z_4X4",64,16,0,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8,4,8;
|
||||||
|
896,128,"Z_4X4",128,32,0,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8;
|
||||||
|
896,256,"Z_4X4",256,64,0,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8;
|
||||||
|
896,512,"Z_4X4",512,128,0,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8;
|
||||||
|
896,1024,"Z_4X4",1024,256,0,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8;
|
||||||
|
896,2048,"Z_4X4",2048,512,0,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8;
|
||||||
|
896,4096,"Z_4X4",4096,1024,0,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8;
|
||||||
|
896,8192,"Z_4X4",5120,2048,1,512,8,512,8,512,8,512,8,512,8,512,8,512,8,256,5,256,5,256,5,256,5,128,2,128,2,128,2,64,0,64,0;
|
||||||
|
896,16384,"Z_4X4",5120,4096,1,1024,8,512,5,512,5,512,5,512,5,256,2,256,2,256,2,256,2,256,2,128,0,128,0,128,0,128,0,128,0,128,0;
|
||||||
|
1792,32,"Z_4X4",128,32,0,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8;
|
||||||
|
1792,64,"Z_4X4",128,32,0,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8;
|
||||||
|
1792,128,"Z_4X4",256,64,0,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8;
|
||||||
|
1792,256,"Z_4X4",512,128,0,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8;
|
||||||
|
1792,512,"Z_4X4",1024,256,0,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8;
|
||||||
|
1792,1024,"Z_4X4",2048,512,0,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8;
|
||||||
|
1792,2048,"Z_4X4",4096,1024,0,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8;
|
||||||
|
1792,4096,"Z_4X4",5120,2048,1,512,8,512,8,512,8,512,8,512,8,512,8,512,8,256,5,256,5,256,5,256,5,128,2,128,2,128,2,64,0,64,0;
|
||||||
|
1792,8192,"Z_4X4",5120,4096,1,1024,8,512,5,512,5,512,5,512,5,256,2,256,2,256,2,256,2,256,2,128,0,128,0,128,0,128,0,128,0,128,0;
|
||||||
|
1792,16384,"Z_4X4",5120,8192,1,512,2,512,2,512,2,512,2,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0;
|
||||||
|
3584,32,"Z_4X4",256,64,0,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8;
|
||||||
|
3584,64,"Z_4X4",256,64,0,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8,16,8;
|
||||||
|
3584,128,"Z_4X4",512,128,0,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8;
|
||||||
|
3584,256,"Z_4X4",1024,256,0,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8;
|
||||||
|
3584,512,"Z_4X4",2048,512,0,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8;
|
||||||
|
3584,1024,"Z_4X4",4096,1024,0,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8;
|
||||||
|
3584,2048,"Z_4X4",5120,2048,1,512,8,512,8,512,8,512,8,512,8,512,8,512,8,256,5,256,5,256,5,256,5,128,2,128,2,128,2,64,0,64,0;
|
||||||
|
3584,4096,"Z_4X4",5120,4096,1,1024,8,512,5,512,5,512,5,512,5,256,2,256,2,256,2,256,2,256,2,128,0,128,0,128,0,128,0,128,0,128,0;
|
||||||
|
3584,8192,"Z_4X4",5120,8192,1,512,2,512,2,512,2,512,2,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0;
|
||||||
|
3584,16384,"Z_4X4",5120,16384,1,512,0,512,0,512,0,512,0,512,0,512,0,512,0,512,0,512,0,512,0,0,15,0,15,0,15,0,15,0,15,0,15;
|
||||||
|
7168,32,"Z_4X4",512,128,0,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8;
|
||||||
|
7168,64,"Z_4X4",512,128,0,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8,32,8;
|
||||||
|
7168,128,"Z_4X4",1024,256,0,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8,64,8;
|
||||||
|
7168,256,"Z_4X4",2048,512,0,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8,128,8;
|
||||||
|
7168,512,"Z_4X4",4096,1024,0,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8,256,8;
|
||||||
|
7168,1024,"Z_4X4",5120,2048,1,512,8,512,8,512,8,512,8,512,8,512,8,512,8,256,5,256,5,256,5,256,5,128,2,128,2,128,2,64,0,64,0;
|
||||||
|
7168,2048,"Z_4X4",5120,4096,1,1024,8,512,5,512,5,512,5,512,5,256,2,256,2,256,2,256,2,256,2,128,0,128,0,128,0,128,0,128,0,128,0;
|
||||||
|
7168,4096,"Z_4X4",5120,8192,1,512,2,512,2,512,2,512,2,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0,256,0;
|
||||||
|
7168,8192,"Z_4X4",5120,16384,1,512,0,512,0,512,0,512,0,512,0,512,0,512,0,512,0,512,0,512,0,0,15,0,15,0,15,0,15,0,15,0,15;
|
||||||
|
7168,16384,"Z_4X4",5120,32768,1,1024,0,1024,0,1024,0,1024,0,1024,0,0,15,0,15,0,15,0,15,0,15,0,15,0,15,0,15,0,15,0,15,0,15;
|
||||||
|
}
|
||||||
|
}
|
||||||
Loading…
Add table
Reference in a new issue