mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-20 04:30:22 +01:00
radv: fix skipping on-disk shaders cache when not useful
This was just broken because individual shaders were still stored on-disk in many situations: - for shader object, all compute/graphics shaders were stored - for fast-GPL, graphics shaders were stored - for pipeline binaries, when the create flag was used - for rt capture/replay and ray history This should stop storing unused binaries on-disk and save space. Found this by inspection. Cc: mesa-stable Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/32227>
This commit is contained in:
Samuel Pitoiset
Marge Bot
parent
9c1de5c6b3
commit
08c9dca8db
6 changed files with 39 additions and 31 deletions
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@ -89,7 +89,7 @@ radv_compute_pipeline_init(struct radv_compute_pipeline *pipeline, const struct
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struct radv_shader *
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radv_compile_cs(struct radv_device *device, struct vk_pipeline_cache *cache, struct radv_shader_stage *cs_stage,
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bool keep_executable_info, bool keep_statistic_info, bool is_internal,
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bool keep_executable_info, bool keep_statistic_info, bool is_internal, bool skip_shaders_cache,
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struct radv_shader_binary **cs_binary)
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{
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struct radv_physical_device *pdev = radv_device_physical(device);
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@ -137,7 +137,7 @@ radv_compile_cs(struct radv_device *device, struct vk_pipeline_cache *cache, str
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*cs_binary =
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radv_shader_nir_to_asm(device, cs_stage, &cs_stage->nir, 1, NULL, keep_executable_info, keep_statistic_info);
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cs_shader = radv_shader_create(device, cache, *cs_binary, keep_executable_info || dump_shader);
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cs_shader = radv_shader_create(device, cache, *cs_binary, skip_shaders_cache || dump_shader);
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cs_shader->nir_string = nir_string;
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@ -223,8 +223,9 @@ radv_compute_pipeline_compile(const VkComputePipelineCreateInfo *pCreateInfo, st
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radv_pipeline_stage_init(pipeline->base.create_flags, pStage, pipeline_layout, &stage_key, &cs_stage);
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pipeline->base.shaders[MESA_SHADER_COMPUTE] = radv_compile_cs(
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device, cache, &cs_stage, keep_executable_info, keep_statistic_info, pipeline->base.is_internal, &cs_binary);
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pipeline->base.shaders[MESA_SHADER_COMPUTE] =
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radv_compile_cs(device, cache, &cs_stage, keep_executable_info, keep_statistic_info, pipeline->base.is_internal,
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skip_shaders_cache, &cs_binary);
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cs_stage.feedback.duration += os_time_get_nano() - stage_start;
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@ -41,7 +41,8 @@ void radv_compute_pipeline_init(struct radv_compute_pipeline *pipeline, const st
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struct radv_shader *radv_compile_cs(struct radv_device *device, struct vk_pipeline_cache *cache,
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struct radv_shader_stage *cs_stage, bool keep_executable_info,
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bool keep_statistic_info, bool is_internal, struct radv_shader_binary **cs_binary);
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bool keep_statistic_info, bool is_internal, bool skip_shaders_cache,
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struct radv_shader_binary **cs_binary);
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VkResult radv_compute_pipeline_create(VkDevice _device, VkPipelineCache _cache,
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const VkComputePipelineCreateInfo *pCreateInfo,
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@ -2224,7 +2224,7 @@ radv_declare_pipeline_args(struct radv_device *device, struct radv_shader_stage
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static struct radv_shader *
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radv_create_gs_copy_shader(struct radv_device *device, struct vk_pipeline_cache *cache,
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struct radv_shader_stage *gs_stage, const struct radv_graphics_state_key *gfx_state,
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bool keep_executable_info, bool keep_statistic_info,
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bool keep_executable_info, bool keep_statistic_info, bool skip_shaders_cache,
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struct radv_shader_binary **gs_copy_binary)
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{
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const struct radv_physical_device *pdev = radv_device_physical(device);
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@ -2284,7 +2284,7 @@ radv_create_gs_copy_shader(struct radv_device *device, struct vk_pipeline_cache
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*gs_copy_binary = radv_shader_nir_to_asm(device, &gs_copy_stage, &nir, 1, &key.gfx_state, keep_executable_info,
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keep_statistic_info);
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struct radv_shader *copy_shader =
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radv_shader_create(device, cache, *gs_copy_binary, keep_executable_info || dump_shader);
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radv_shader_create(device, cache, *gs_copy_binary, skip_shaders_cache || dump_shader);
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if (copy_shader) {
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copy_shader->nir_string = nir_string;
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@ -2301,7 +2301,7 @@ radv_create_gs_copy_shader(struct radv_device *device, struct vk_pipeline_cache
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static void
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radv_graphics_shaders_nir_to_asm(struct radv_device *device, struct vk_pipeline_cache *cache,
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struct radv_shader_stage *stages, const struct radv_graphics_state_key *gfx_state,
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bool keep_executable_info, bool keep_statistic_info,
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bool keep_executable_info, bool keep_statistic_info, bool skip_shaders_cache,
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VkShaderStageFlagBits active_nir_stages, struct radv_shader **shaders,
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struct radv_shader_binary **binaries, struct radv_shader **gs_copy_shader,
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struct radv_shader_binary **gs_copy_binary)
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@ -2357,7 +2357,7 @@ radv_graphics_shaders_nir_to_asm(struct radv_device *device, struct vk_pipeline_
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binaries[s] = radv_shader_nir_to_asm(device, &stages[s], nir_shaders, shader_count, gfx_state,
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keep_executable_info, keep_statistic_info);
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shaders[s] = radv_shader_create(device, cache, binaries[s], keep_executable_info || dump_shader);
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shaders[s] = radv_shader_create(device, cache, binaries[s], skip_shaders_cache || dump_shader);
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shaders[s]->nir_string = nir_string;
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@ -2368,8 +2368,9 @@ radv_graphics_shaders_nir_to_asm(struct radv_device *device, struct vk_pipeline_
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simple_mtx_unlock(&instance->shader_dump_mtx);
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if (s == MESA_SHADER_GEOMETRY && !stages[s].info.is_ngg) {
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*gs_copy_shader = radv_create_gs_copy_shader(device, cache, &stages[MESA_SHADER_GEOMETRY], gfx_state,
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keep_executable_info, keep_statistic_info, gs_copy_binary);
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*gs_copy_shader =
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radv_create_gs_copy_shader(device, cache, &stages[MESA_SHADER_GEOMETRY], gfx_state, keep_executable_info,
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keep_statistic_info, skip_shaders_cache, gs_copy_binary);
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}
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stages[s].feedback.duration += os_time_get_nano() - stage_start;
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@ -2578,7 +2579,7 @@ void
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radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cache *cache,
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struct radv_shader_stage *stages, const struct radv_graphics_state_key *gfx_state,
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bool keep_executable_info, bool keep_statistic_info, bool is_internal,
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struct radv_retained_shaders *retained_shaders, bool noop_fs,
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bool skip_shaders_cache, struct radv_retained_shaders *retained_shaders, bool noop_fs,
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struct radv_shader **shaders, struct radv_shader_binary **binaries,
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struct radv_shader **gs_copy_shader, struct radv_shader_binary **gs_copy_binary)
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{
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@ -2749,7 +2750,8 @@ radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cac
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/* Compile NIR shaders to AMD assembly. */
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radv_graphics_shaders_nir_to_asm(device, cache, stages, gfx_state, keep_executable_info, keep_statistic_info,
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active_nir_stages, shaders, binaries, gs_copy_shader, gs_copy_binary);
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skip_shaders_cache, active_nir_stages, shaders, binaries, gs_copy_shader,
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gs_copy_binary);
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if (keep_executable_info) {
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for (int i = 0; i < MESA_VULKAN_SHADER_STAGES; ++i) {
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@ -2993,8 +2995,9 @@ radv_graphics_pipeline_compile(struct radv_graphics_pipeline *pipeline, const Vk
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const bool noop_fs = radv_pipeline_needs_noop_fs(pipeline, &gfx_state->key.gfx_state);
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radv_graphics_shaders_compile(device, cache, stages, &gfx_state->key.gfx_state, keep_executable_info,
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keep_statistic_info, pipeline->base.is_internal, retained_shaders, noop_fs,
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pipeline->base.shaders, binaries, &pipeline->base.gs_copy_shader, &gs_copy_binary);
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keep_statistic_info, pipeline->base.is_internal, skip_shaders_cache, retained_shaders,
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noop_fs, pipeline->base.shaders, binaries, &pipeline->base.gs_copy_shader,
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&gs_copy_binary);
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if (!skip_shaders_cache) {
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radv_pipeline_cache_insert(device, cache, &pipeline->base);
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@ -593,8 +593,8 @@ struct radv_ps_epilog_key radv_generate_ps_epilog_key(const struct radv_device *
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void radv_graphics_shaders_compile(struct radv_device *device, struct vk_pipeline_cache *cache,
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struct radv_shader_stage *stages, const struct radv_graphics_state_key *gfx_state,
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bool keep_executable_info, bool keep_statistic_info, bool is_internal,
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struct radv_retained_shaders *retained_shaders, bool noop_fs,
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struct radv_shader **shaders, struct radv_shader_binary **binaries,
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bool skip_shaders_cache, struct radv_retained_shaders *retained_shaders,
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bool noop_fs, struct radv_shader **shaders, struct radv_shader_binary **binaries,
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struct radv_shader **gs_copy_shader, struct radv_shader_binary **gs_copy_binary);
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struct radv_vgt_shader_key {
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@ -360,7 +360,8 @@ radv_rt_nir_to_asm(struct radv_device *device, struct vk_pipeline_cache *cache,
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bool monolithic, struct radv_shader_stage *stage, uint32_t *stack_size,
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struct radv_ray_tracing_stage_info *stage_info,
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const struct radv_ray_tracing_stage_info *traversal_stage_info,
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struct radv_serialized_shader_arena_block *replay_block, struct radv_shader **out_shader)
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struct radv_serialized_shader_arena_block *replay_block, bool skip_shaders_cache,
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struct radv_shader **out_shader)
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{
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struct radv_physical_device *pdev = radv_device_physical(device);
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struct radv_instance *instance = radv_physical_device_instance(pdev);
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@ -466,7 +467,7 @@ radv_rt_nir_to_asm(struct radv_device *device, struct vk_pipeline_cache *cache,
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return result;
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}
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} else
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shader = radv_shader_create(device, cache, binary, keep_executable_info || dump_shader);
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shader = radv_shader_create(device, cache, binary, skip_shaders_cache || dump_shader);
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if (shader) {
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shader->nir_string = nir_string;
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@ -583,7 +584,7 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
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const VkRayTracingPipelineCreateInfoKHR *pCreateInfo,
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const VkPipelineCreationFeedbackCreateInfo *creation_feedback,
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const struct radv_shader_stage_key *stage_keys, struct radv_ray_tracing_pipeline *pipeline,
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struct radv_serialized_shader_arena_block *capture_replay_handles)
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struct radv_serialized_shader_arena_block *capture_replay_handles, bool skip_shaders_cache)
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{
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VK_FROM_HANDLE(radv_pipeline_layout, pipeline_layout, pCreateInfo->layout);
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@ -681,8 +682,9 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
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bool monolithic_raygen = monolithic && stage->stage == MESA_SHADER_RAYGEN;
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result = radv_rt_nir_to_asm(device, cache, pCreateInfo, pipeline, monolithic_raygen, stage, &stack_size,
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&rt_stages[idx].info, NULL, replay_block, &rt_stages[idx].shader);
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result =
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radv_rt_nir_to_asm(device, cache, pCreateInfo, pipeline, monolithic_raygen, stage, &stack_size,
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&rt_stages[idx].info, NULL, replay_block, skip_shaders_cache, &rt_stages[idx].shader);
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if (result != VK_SUCCESS)
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goto cleanup;
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@ -739,8 +741,9 @@ radv_rt_compile_shaders(struct radv_device *device, struct vk_pipeline_cache *ca
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.key = stage_keys[MESA_SHADER_INTERSECTION],
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};
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radv_shader_layout_init(pipeline_layout, MESA_SHADER_INTERSECTION, &traversal_stage.layout);
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result = radv_rt_nir_to_asm(device, cache, pCreateInfo, pipeline, false, &traversal_stage, NULL, NULL,
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&traversal_info, NULL, &pipeline->base.base.shaders[MESA_SHADER_INTERSECTION]);
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result =
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radv_rt_nir_to_asm(device, cache, pCreateInfo, pipeline, false, &traversal_stage, NULL, NULL, &traversal_info,
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NULL, skip_shaders_cache, &pipeline->base.base.shaders[MESA_SHADER_INTERSECTION]);
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ralloc_free(traversal_nir);
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cleanup:
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@ -942,7 +945,7 @@ radv_rt_pipeline_compile(struct radv_device *device, const VkRayTracingPipelineC
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}
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result = radv_rt_compile_shaders(device, cache, pCreateInfo, creation_feedback, rt_state->stage_keys, pipeline,
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capture_replay_blocks);
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capture_replay_blocks, skip_shaders_cache);
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if (result != VK_SUCCESS)
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return result;
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@ -186,7 +186,7 @@ radv_shader_object_init_graphics(struct radv_shader_object *shader_obj, struct r
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struct radv_shader *shaders[MESA_VULKAN_SHADER_STAGES] = {NULL};
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struct radv_shader_binary *binaries[MESA_VULKAN_SHADER_STAGES] = {NULL};
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radv_graphics_shaders_compile(device, NULL, stages, &gfx_state, false, false, false, NULL, false, shaders,
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radv_graphics_shaders_compile(device, NULL, stages, &gfx_state, false, false, false, true, NULL, false, shaders,
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binaries, &shader_obj->gs.copy_shader, &shader_obj->gs.copy_binary);
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shader = shaders[stage];
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@ -205,8 +205,8 @@ radv_shader_object_init_graphics(struct radv_shader_object *shader_obj, struct r
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radv_shader_stage_init(pCreateInfo, &stages[stage]);
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stages[stage].next_stage = next_stage;
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radv_graphics_shaders_compile(device, NULL, stages, &gfx_state, false, false, false, NULL, false, shaders,
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binaries, &shader_obj->gs.copy_shader, &shader_obj->gs.copy_binary);
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radv_graphics_shaders_compile(device, NULL, stages, &gfx_state, false, false, false, true, NULL, false,
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shaders, binaries, &shader_obj->gs.copy_shader, &shader_obj->gs.copy_binary);
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shader = shaders[stage];
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binary = binaries[stage];
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@ -251,7 +251,7 @@ radv_shader_object_init_compute(struct radv_shader_object *shader_obj, struct ra
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radv_shader_stage_init(pCreateInfo, &stage);
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struct radv_shader *cs_shader = radv_compile_cs(device, NULL, &stage, false, false, false, &cs_binary);
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struct radv_shader *cs_shader = radv_compile_cs(device, NULL, &stage, false, false, false, true, &cs_binary);
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ralloc_free(stage.nir);
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@ -512,8 +512,8 @@ radv_shader_object_create_linked(VkDevice _device, uint32_t createInfoCount, con
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struct radv_shader *gs_copy_shader = NULL;
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struct radv_shader_binary *gs_copy_binary = NULL;
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radv_graphics_shaders_compile(device, NULL, stages, &gfx_state, false, false, false, NULL, false, shaders, binaries,
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&gs_copy_shader, &gs_copy_binary);
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radv_graphics_shaders_compile(device, NULL, stages, &gfx_state, false, false, false, true, NULL, false, shaders,
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binaries, &gs_copy_shader, &gs_copy_binary);
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for (unsigned i = 0; i < createInfoCount; i++) {
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const VkShaderCreateInfoEXT *pCreateInfo = &pCreateInfos[i];
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