From 08834a3721e7c1907343e7d36cf7b481e15688b2 Mon Sep 17 00:00:00 2001 From: Bas Nieuwenhuizen Date: Wed, 23 Jan 2019 22:44:05 +0100 Subject: [PATCH] amd/common: Use correct writemask for shared memory stores. The check was for 1 bit being set, which is clearly not what we want. CC: Reviewed-by: Samuel Pitoiset (cherry picked from commit 3c24fc64c7a4e564d84843fab7db25963d574d99) --- src/amd/common/ac_nir_to_llvm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index c1db8f30389..593ca7100b7 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -2072,7 +2072,7 @@ visit_store_var(struct ac_nir_context *ctx, int writemask = instr->const_index[0]; LLVMValueRef address = get_src(ctx, instr->src[0]); LLVMValueRef val = get_src(ctx, instr->src[1]); - if (util_is_power_of_two_nonzero(writemask)) { + if (writemask == (1u << ac_get_llvm_num_components(val)) - 1) { val = LLVMBuildBitCast( ctx->ac.builder, val, LLVMGetElementType(LLVMTypeOf(address)), "");