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radeon: Move DMA ring creation to common code

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Signed-off-by: Niels Ole Salscheider <niels_ole@salscheider-online.de>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
This commit is contained in:
Niels Ole Salscheider 2014-03-13 20:07:13 +01:00 • committed by Marek Olšák
parent a9cf3aa208
commit 087b0ff1c1
4 changed files with 32 additions and 31 deletions
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30
src/gallium/drivers/r600/r600_pipe.c
View file

@ -48,7 +48,6 @@ static const struct debug_named_value r600_debug_options[] = {
{ "nollvm", DBG_NO_LLVM, "Disable the LLVM shader compiler" },
#endif
{ "nocpdma", DBG_NO_CP_DMA, "Disable CP DMA" },
{ "nodma", DBG_NO_ASYNC_DMA, "Disable asynchronous DMA" },
/* shader backend */
{ "nosb", DBG_NO_SB, "Disable sb backend for graphics shaders" },
@ -121,20 +120,6 @@ static void r600_flush_gfx_ring(void *ctx, unsigned flags)
r600_flush((struct pipe_context*)ctx, flags);
}
static void r600_flush_dma_ring(void *ctx, unsigned flags)
{
struct r600_context *rctx = (struct r600_context *)ctx;
struct radeon_winsys_cs *cs = rctx->b.rings.dma.cs;
if (!cs->cdw) {
return;
}
rctx->b.rings.dma.flushing = true;
rctx->b.ws->cs_flush(cs, flags, 0);
rctx->b.rings.dma.flushing = false;
}
static void r600_flush_from_winsys(void *ctx, unsigned flags)
{
struct r600_context *rctx = (struct r600_context *)ctx;
@ -142,13 +127,6 @@ static void r600_flush_from_winsys(void *ctx, unsigned flags)
rctx->b.rings.gfx.flush(rctx, flags);
}
static void r600_flush_dma_from_winsys(void *ctx, unsigned flags)
{
struct r600_context *rctx = (struct r600_context *)ctx;
rctx->b.rings.dma.flush(rctx, flags);
}
static void r600_destroy_context(struct pipe_context *context)
{
struct r600_context *rctx = (struct r600_context *)context;
@ -269,14 +247,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen, void
rctx->b.ws->cs_set_flush_callback(rctx->b.rings.gfx.cs, r600_flush_from_winsys, rctx);
rctx->b.rings.gfx.flushing = false;
rctx->b.rings.dma.cs = NULL;
if (rscreen->b.info.r600_has_dma && !(rscreen->b.debug_flags & DBG_NO_ASYNC_DMA)) {
rctx->b.rings.dma.cs = rctx->b.ws->cs_create(rctx->b.ws, RING_DMA, NULL);
rctx->b.rings.dma.flush = r600_flush_dma_ring;
rctx->b.ws->cs_set_flush_callback(rctx->b.rings.dma.cs, r600_flush_dma_from_winsys, rctx);
rctx->b.rings.dma.flushing = false;
}
rctx->allocator_fetch_shader = u_suballocator_create(&rctx->b.b, 64 * 1024, 256,
0, PIPE_USAGE_DEFAULT, FALSE);
if (!rctx->allocator_fetch_shader)

1
src/gallium/drivers/r600/r600_pipe.h
View file

@ -197,7 +197,6 @@ struct r600_gs_rings_state {
/* features */
#define DBG_NO_LLVM (1 << 17)
#define DBG_NO_CP_DMA (1 << 18)
#define DBG_NO_ASYNC_DMA (1 << 19)
/* shader backend */
#define DBG_NO_SB (1 << 21)
#define DBG_SB_CS (1 << 22)

30
src/gallium/drivers/radeon/r600_pipe_common.c
View file

@ -43,6 +43,27 @@ static void r600_memory_barrier(struct pipe_context *ctx, unsigned flags)
{
}
static void r600_flush_dma_ring(void *ctx, unsigned flags)
{
struct r600_common_context *rctx = (struct r600_common_context *)ctx;
struct radeon_winsys_cs *cs = rctx->rings.dma.cs;
if (!cs->cdw) {
return;
}
rctx->rings.dma.flushing = true;
rctx->ws->cs_flush(cs, flags, 0);
rctx->rings.dma.flushing = false;
}
static void r600_flush_dma_from_winsys(void *ctx, unsigned flags)
{
struct r600_common_context *rctx = (struct r600_common_context *)ctx;
rctx->rings.dma.flush(rctx, flags);
}
bool r600_common_context_init(struct r600_common_context *rctx,
struct r600_common_screen *rscreen)
{
@ -77,6 +98,12 @@ bool r600_common_context_init(struct r600_common_context *rctx,
if (!rctx->uploader)
return false;
if (rscreen->info.r600_has_dma && !(rscreen->debug_flags & DBG_NO_ASYNC_DMA)) {
rctx->rings.dma.cs = rctx->ws->cs_create(rctx->ws, RING_DMA, NULL);
rctx->rings.dma.flush = r600_flush_dma_ring;
rctx->ws->cs_set_flush_callback(rctx->rings.dma.cs, r600_flush_dma_from_winsys, rctx);
}
return true;
}
@ -136,6 +163,9 @@ static const struct debug_named_value common_debug_options[] = {
{ "vm", DBG_VM, "Print virtual addresses when creating resources" },
{ "trace_cs", DBG_TRACE_CS, "Trace cs and write rlockup_<csid>.c file with faulty cs" },
/* features */
{ "nodma", DBG_NO_ASYNC_DMA, "Disable asynchronous DMA" },
/* shaders */
{ "fs", DBG_FS, "Print fetch shaders" },
{ "vs", DBG_VS, "Print vertex shaders" },

2
src/gallium/drivers/radeon/r600_pipe_common.h
View file

@ -76,6 +76,8 @@
#define DBG_COMPUTE (1 << 2)
#define DBG_VM (1 << 3)
#define DBG_TRACE_CS (1 << 4)
/* features */
#define DBG_NO_ASYNC_DMA (1 << 5)
/* shaders */
#define DBG_FS (1 << 8)
#define DBG_VS (1 << 9)