From 083e7d3a92f362b2a901a1758adbc2e15c0eddef Mon Sep 17 00:00:00 2001 From: Samuel Pitoiset Date: Fri, 1 Sep 2023 13:52:28 +0200 Subject: [PATCH] radv: fix capturing indirect dispatches with SQTT Looks like indirect dispatches require an event marker instead of an event marker with dims. That makes sense somehow given the blocks size is not known at record time with indirect dispatches. This allows RGP to report correct block sizes. Signed-off-by: Samuel Pitoiset Part-of: --- src/amd/vulkan/layers/radv_sqtt_layer.c | 9 +++++++-- src/amd/vulkan/radv_cmd_buffer.c | 2 +- src/amd/vulkan/radv_private.h | 2 +- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/amd/vulkan/layers/radv_sqtt_layer.c b/src/amd/vulkan/layers/radv_sqtt_layer.c index 5024843b4bf..c276bc91640 100644 --- a/src/amd/vulkan/layers/radv_sqtt_layer.c +++ b/src/amd/vulkan/layers/radv_sqtt_layer.c @@ -358,12 +358,17 @@ radv_describe_draw(struct radv_cmd_buffer *cmd_buffer) } void -radv_describe_dispatch(struct radv_cmd_buffer *cmd_buffer, int x, int y, int z) +radv_describe_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_info *info) { if (likely(!cmd_buffer->device->sqtt.bo)) return; - radv_write_event_with_dims_marker(cmd_buffer, cmd_buffer->state.current_event_type, x, y, z); + if (info->indirect) { + radv_write_event_marker(cmd_buffer, cmd_buffer->state.current_event_type, UINT_MAX, UINT_MAX, UINT_MAX); + } else { + radv_write_event_with_dims_marker(cmd_buffer, cmd_buffer->state.current_event_type, info->blocks[0], + info->blocks[1], info->blocks[2]); + } } void diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index f3882ccc724..6d1f9c27d82 100644 --- a/src/amd/vulkan/radv_cmd_buffer.c +++ b/src/amd/vulkan/radv_cmd_buffer.c @@ -9561,7 +9561,7 @@ radv_emit_dispatch_packets(struct radv_cmd_buffer *cmd_buffer, const struct radv struct radeon_cmdbuf *cs = cmd_buffer->cs; const struct radv_userdata_info *loc = radv_get_user_sgpr(compute_shader, AC_UD_CS_GRID_SIZE); - radv_describe_dispatch(cmd_buffer, info->blocks[0], info->blocks[1], info->blocks[2]); + radv_describe_dispatch(cmd_buffer, info); ASSERTED unsigned cdw_max = radeon_check_space(ws, cs, 30); diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h index 47e315488e9..35e791dcad8 100644 --- a/src/amd/vulkan/radv_private.h +++ b/src/amd/vulkan/radv_private.h @@ -3209,7 +3209,7 @@ enum rgp_barrier_reason { void radv_describe_begin_cmd_buffer(struct radv_cmd_buffer *cmd_buffer); void radv_describe_end_cmd_buffer(struct radv_cmd_buffer *cmd_buffer); void radv_describe_draw(struct radv_cmd_buffer *cmd_buffer); -void radv_describe_dispatch(struct radv_cmd_buffer *cmd_buffer, int x, int y, int z); +void radv_describe_dispatch(struct radv_cmd_buffer *cmd_buffer, const struct radv_dispatch_info *info); void radv_describe_begin_render_pass_clear(struct radv_cmd_buffer *cmd_buffer, VkImageAspectFlagBits aspects); void radv_describe_end_render_pass_clear(struct radv_cmd_buffer *cmd_buffer); void radv_describe_begin_render_pass_resolve(struct radv_cmd_buffer *cmd_buffer);