From 07b7de35cca7142948e435697b1da1e69a67f747 Mon Sep 17 00:00:00 2001 From: Lionel Landwerlin Date: Fri, 14 Nov 2025 12:04:30 +0200 Subject: [PATCH] anv: Wa_18040903259 only applies to RCS when in GPGPU mode Sadly this probably won't change anything in terms of perf as the CCS engine has a bunch of other restrictions. Signed-off-by: Lionel Landwerlin Fixes: 243c01c703 ("anv/iris: implement Wa_18040903259") Reviewed-by: Alyssa Rosenzweig Reviewed-by: Sagar Ghuge Part-of: --- src/intel/vulkan/genX_cmd_buffer.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c index 275daeef59c..bc71edd2036 100644 --- a/src/intel/vulkan/genX_cmd_buffer.c +++ b/src/intel/vulkan/genX_cmd_buffer.c @@ -2445,16 +2445,27 @@ emit_pipe_control(struct anv_batch *batch, trace_intel_begin_stall(batch->trace); } - /* XXX - insert all workarounds and GFX specific things below. */ -#if INTEL_WA_1607156449_GFX_VER || INTEL_NEEDS_WA_18040903259 +#if INTEL_WA_1607156449_GFX_VER /* Wa_1607156449: For COMPUTE Workload - Any PIPE_CONTROL command with * POST_SYNC Operation Enabled MUST be preceded by a PIPE_CONTROL with * CS_STALL Bit set (with No POST_SYNC ENABLED) * - * Wa_18040903259 says that timestamp are incorrect (not doing the CS Stall - * prior to writing the timestamp) with a command like this: + */ + if (intel_needs_workaround(devinfo, 1607156449) && + current_pipeline == GPGPU && post_sync_op != NoWrite) { + emit_pipe_control(batch, devinfo, current_pipeline, + NoWrite, ANV_NULL_ADDRESS, 0, + bits, "Wa_1607156449"); + bits = ANV_PIPE_CS_STALL_BIT; + } +#endif + +#if INTEL_NEEDS_WA_18040903259 + /* Wa_18040903259 says that on RCS engine, in GPGPU mode, timestamp are + * incorrect (not doing the CS Stall prior to writing the timestamp) with a + * command like this: * * PIPE_CONTROL(CS Stall, Post Sync = Timestamp) * @@ -2470,13 +2481,13 @@ emit_pipe_control(struct anv_batch *batch, * first or second PIPE_CONTROL. It seems logical that it should go to the * first so that the timestamp accounts for all the associated flushes. */ - if ((intel_needs_workaround(devinfo, 1607156449) || - intel_needs_workaround(devinfo, 18040903259)) && + if (intel_needs_workaround(devinfo, 18040903259) && + batch->engine_class == INTEL_ENGINE_CLASS_RENDER && current_pipeline == GPGPU && post_sync_op != NoWrite) { emit_pipe_control(batch, devinfo, current_pipeline, NoWrite, ANV_NULL_ADDRESS, 0, - bits, "Wa_18040903259/Wa_18040903259"); + bits, "Wa_18040903259"); bits = ANV_PIPE_CS_STALL_BIT; } #endif