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svga: deriv insns not valid in dynamic flow control either
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a9cdae2ae0
commit
0748fc4f03
1 changed files with 48 additions and 3 deletions
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@ -46,8 +46,6 @@ translate_opcode(
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case TGSI_OPCODE_ABS: return SVGA3DOP_ABS;
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case TGSI_OPCODE_ADD: return SVGA3DOP_ADD;
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case TGSI_OPCODE_BREAKC: return SVGA3DOP_BREAKC;
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case TGSI_OPCODE_DDX: return SVGA3DOP_DSX;
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case TGSI_OPCODE_DDY: return SVGA3DOP_DSY;
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case TGSI_OPCODE_DP2A: return SVGA3DOP_DP2ADD;
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case TGSI_OPCODE_DP3: return SVGA3DOP_DP3;
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case TGSI_OPCODE_DP4: return SVGA3DOP_DP4;
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@ -1204,7 +1202,8 @@ static boolean emit_tex2(struct svga_shader_emitter *emit,
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/* Can't do mipmapping inside dynamic branch constructs. Force LOD
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* zero in that case.
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*/
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if (emit->dynamic_branching_level > 0) {
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if (emit->dynamic_branching_level > 0 &&
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SVGA3dShaderGetRegType(texcoord.base.value) == SVGA3DREG_TEMP) {
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struct src_register zero = get_zero_immediate( emit );
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/* MOV tmp, texcoord */
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@ -1438,6 +1437,46 @@ static boolean emit_simple_instruction(struct svga_shader_emitter *emit,
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}
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}
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static boolean emit_deriv(struct svga_shader_emitter *emit,
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const struct tgsi_full_instruction *insn )
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{
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if (emit->dynamic_branching_level > 0 &&
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insn->Src[0].Register.File == TGSI_FILE_TEMPORARY)
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{
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struct src_register zero = get_zero_immediate( emit );
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SVGA3dShaderDestToken dst =
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translate_dst_register( emit, insn, 0 );
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/* Deriv opcodes not valid inside dynamic branching, workaround
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* by zeroing out the destination.
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*/
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if (!submit_op1(emit,
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inst_token( SVGA3DOP_MOV ),
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dst,
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scalar(zero, TGSI_SWIZZLE_X)))
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return FALSE;
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return TRUE;
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}
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else {
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unsigned opcode;
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switch (insn->Instruction.Opcode) {
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case TGSI_OPCODE_DDX:
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opcode = SVGA3DOP_DSX;
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break;
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case TGSI_OPCODE_DDY:
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opcode = SVGA3DOP_DSY;
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break;
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default:
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return FALSE;
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}
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return emit_simple_instruction( emit, opcode, insn );
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}
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}
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static boolean emit_arl(struct svga_shader_emitter *emit,
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const struct tgsi_full_instruction *insn)
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{
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@ -2042,6 +2081,10 @@ static boolean svga_emit_instruction( struct svga_shader_emitter *emit,
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case TGSI_OPCODE_TXD:
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return emit_tex( emit, insn );
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case TGSI_OPCODE_DDX:
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case TGSI_OPCODE_DDY:
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return emit_deriv( emit, insn );
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case TGSI_OPCODE_BGNSUB:
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return emit_bgnsub( emit, position, insn );
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@ -2538,6 +2581,8 @@ needs_to_create_zero( struct svga_shader_emitter *emit )
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if (emit->info.opcode_count[TGSI_OPCODE_IF] >= 1 ||
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emit->info.opcode_count[TGSI_OPCODE_BGNLOOP] >= 1 ||
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emit->info.opcode_count[TGSI_OPCODE_BGNFOR] >= 1 ||
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emit->info.opcode_count[TGSI_OPCODE_DDX] >= 1 ||
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emit->info.opcode_count[TGSI_OPCODE_DDY] >= 1 ||
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emit->info.opcode_count[TGSI_OPCODE_SGE] >= 1 ||
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emit->info.opcode_count[TGSI_OPCODE_SGT] >= 1 ||
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emit->info.opcode_count[TGSI_OPCODE_SLE] >= 1 ||
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