fdo-mirrors/mesa
1
0
Fork 0
mirror of https://gitlab.freedesktop.org/mesa/mesa.git synced 2026-05-05 16:08:04 +02:00
Code Issues Projects Releases Packages Wiki Activity Actions 2

nouveau: pass nouveau_bo instead of pipe_buffer to so_ calls

Browse source
This commit is contained in:
Ben Skeggs 2009-06-04 16:13:56 +10:00
parent 04cef8a037
commit 072fdc1fd3
19 changed files with 136 additions and 101 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

21
src/gallium/drivers/nouveau/nouveau_stateobj.h
View file

@ -4,7 +4,7 @@
#include "util/u_debug.h"
struct nouveau_stateobj_reloc {
struct pipe_buffer *bo;
struct nouveau_bo *bo;
unsigned offset;
unsigned packet;
@ -51,7 +51,7 @@ so_ref(struct nouveau_stateobj *ref, struct nouveau_stateobj **pso)
if (pipe_reference((struct pipe_reference**)pso, &ref->reference)) {
free(so->push);
for (i = 0; i < so->cur_reloc; i++)
pipe_buffer_reference(&so->reloc[i].bo, NULL);
nouveau_bo_ref(NULL, &so->reloc[i].bo);
free(so->reloc);
free(so);
}
@ -81,13 +81,13 @@ so_method(struct nouveau_stateobj *so, struct nouveau_grobj *gr,
}
static INLINE void
so_reloc(struct nouveau_stateobj *so, struct pipe_buffer *bo,
so_reloc(struct nouveau_stateobj *so, struct nouveau_bo *bo,
unsigned data, unsigned flags, unsigned vor, unsigned tor)
{
struct nouveau_stateobj_reloc *r = &so->reloc[so->cur_reloc++];
r->bo = NULL;
pipe_buffer_reference(&r->bo, bo);
nouveau_bo_ref(bo, &r->bo);
r->offset = so->cur - so->push;
r->packet = so->cur_packet;
r->data = data;
@ -122,8 +122,8 @@ so_emit(struct nouveau_winsys *nvws, struct nouveau_stateobj *so)
struct nouveau_stateobj_reloc *r = &so->reloc[i];
nouveau_pushbuf_emit_reloc(nvws->channel, pb->cur + r->offset,
nvws->get_bo(r->bo), r->data,
r->flags, r->vor, r->tor);
r->bo, r->data, r->flags, r->vor,
r->tor);
}
pb->cur += nr;
}
@ -145,15 +145,14 @@ so_emit_reloc_markers(struct nouveau_winsys *nvws, struct nouveau_stateobj *so)
for (i = 0; i < so->cur_reloc; i++) {
struct nouveau_stateobj_reloc *r = &so->reloc[i];
nouveau_pushbuf_emit_reloc(nvws->channel, pb->cur++,
nvws->get_bo(r->bo), r->packet,
nouveau_pushbuf_emit_reloc(nvws->channel, pb->cur++, r->bo,
r->packet,
(r->flags & (NOUVEAU_BO_VRAM |
NOUVEAU_BO_GART |
NOUVEAU_BO_RDWR)) |
NOUVEAU_BO_DUMMY, 0, 0);
nouveau_pushbuf_emit_reloc(nvws->channel, pb->cur++,
nvws->get_bo(r->bo), r->data,
r->flags | NOUVEAU_BO_DUMMY,
nouveau_pushbuf_emit_reloc(nvws->channel, pb->cur++, r->bo,
r->data, r->flags | NOUVEAU_BO_DUMMY,
r->vor, r->tor);
}
}

2
src/gallium/drivers/nv30/nv30_context.h
View file

@ -19,6 +19,8 @@
#include "nouveau/nouveau_push.h"
#include "nouveau/nouveau_stateobj.h"
#define nouveau_bo(pb) nv30->screen->nvws->get_bo(pb)
#include "nv30_state.h"
#define NOUVEAU_ERR(fmt, args...) \

7
src/gallium/drivers/nv30/nv30_fragprog.c
View file

@ -855,9 +855,10 @@ nv30_fragprog_validate(struct nv30_context *nv30)
so = so_new(8, 1);
so_method(so, nv30->screen->rankine, NV34TCL_FP_ACTIVE_PROGRAM, 1);
so_reloc (so, fp->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
NV34TCL_FP_ACTIVE_PROGRAM_DMA0, NV34TCL_FP_ACTIVE_PROGRAM_DMA1);
so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW |
NOUVEAU_BO_OR, NV34TCL_FP_ACTIVE_PROGRAM_DMA0,
NV34TCL_FP_ACTIVE_PROGRAM_DMA1);
so_method(so, nv30->screen->rankine, NV34TCL_FP_CONTROL, 1);
so_data (so, fp->fp_control);
so_method(so, nv30->screen->rankine, NV34TCL_FP_REG_CONTROL, 1);

7
src/gallium/drivers/nv30/nv30_fragtex.c
View file

@ -61,6 +61,7 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
struct nv30_sampler_state *ps = nv30->tex_sampler[unit];
struct nv30_miptree *nv30mt = nv30->tex_miptree[unit];
struct pipe_texture *pt = &nv30mt->base;
struct nouveau_bo *bo = nouveau_bo(nv30mt->buffer);
struct nv30_texture_format *tf;
struct nouveau_stateobj *so;
uint32_t txf, txs , txp;
@ -106,9 +107,9 @@ nv30_fragtex_build(struct nv30_context *nv30, int unit)
so = so_new(16, 2);
so_method(so, nv30->screen->rankine, NV34TCL_TX_OFFSET(unit), 8);
so_reloc (so, nv30mt->buffer, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, nv30mt->buffer, txf, tex_flags | NOUVEAU_BO_OR,
NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1);
so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR,
NV34TCL_TX_FORMAT_DMA0, NV34TCL_TX_FORMAT_DMA1);
so_data (so, ps->wrap);
so_data (so, NV34TCL_TX_ENABLE_ENABLE | ps->en);
so_data (so, txs);

30
src/gallium/drivers/nv30/nv30_state_fb.c
View file

@ -80,36 +80,36 @@ nv30_state_framebuffer_validate(struct nv30_context *nv30)
nv30mt = (struct nv30_miptree *)rt[0]->base.texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR0, 1);
so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_COLOR0_PITCH, 2);
so_data (so, pitch);
so_reloc (so, nv30mt->buffer, rt[0]->base.offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, nouveau_bo(nv30mt->buffer), rt[0]->base.offset,
rt_flags | NOUVEAU_BO_LOW, 0, 0);
}
if (rt_enable & NV34TCL_RT_ENABLE_COLOR1) {
nv30mt = (struct nv30_miptree *)rt[1]->base.texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_COLOR1, 1);
so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_COLOR1_OFFSET, 2);
so_reloc (so, nv30mt->buffer, rt[1]->base.offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, nouveau_bo(nv30mt->buffer), rt[1]->base.offset,
rt_flags | NOUVEAU_BO_LOW, 0, 0);
so_data (so, rt[1]->pitch);
}
if (zeta_format) {
nv30mt = (struct nv30_miptree *)zeta->base.texture;
so_method(so, nv30->screen->rankine, NV34TCL_DMA_ZETA, 1);
so_reloc (so, nv30mt->buffer, 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_reloc (so, nouveau_bo(nv30mt->buffer), 0, rt_flags | NOUVEAU_BO_OR,
nv30->nvws->channel->vram->handle,
nv30->nvws->channel->gart->handle);
so_method(so, nv30->screen->rankine, NV34TCL_ZETA_OFFSET, 1);
so_reloc (so, nv30mt->buffer, zeta->base.offset, rt_flags |
NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, nouveau_bo(nv30mt->buffer), zeta->base.offset,
rt_flags | NOUVEAU_BO_LOW, 0, 0);
/* TODO: allocate LMA depth buffer */
}

14
src/gallium/drivers/nv30/nv30_vbo.c
View file

@ -521,18 +521,20 @@ nv30_vbo_validate(struct nv30_context *nv30)
return FALSE;
}
so_reloc(vtxbuf, vb->buffer, vb->buffer_offset + ve->src_offset,
vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
0, NV34TCL_VTXBUF_ADDRESS_DMA1);
so_reloc(vtxbuf, nouveau_bo(vb->buffer), vb->buffer_offset +
ve->src_offset, vb_flags | NOUVEAU_BO_LOW |
NOUVEAU_BO_OR, 0, NV34TCL_VTXBUF_ADDRESS_DMA1);
so_data (vtxfmt, ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) |
(ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type));
}
if (ib) {
struct nouveau_bo *bo = nouveau_bo(ib);
so_method(vtxbuf, rankine, NV34TCL_IDXBUF_ADDRESS, 2);
so_reloc (vtxbuf, ib, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (vtxbuf, ib, ib_format, vb_flags | NOUVEAU_BO_OR,
0, NV34TCL_IDXBUF_FORMAT_DMA1);
so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR,
0, NV34TCL_IDXBUF_FORMAT_DMA1);
}
so_method(vtxbuf, rankine, 0x1710, 1);

2
src/gallium/drivers/nv40/nv40_context.h
View file

@ -21,6 +21,8 @@
#include "nv40_state.h"
#define nouveau_bo(pb) nv40->screen->nvws->get_bo(pb)
#define NOUVEAU_ERR(fmt, args...) \
fprintf(stderr, "%s:%d - "fmt, __func__, __LINE__, ##args);
#define NOUVEAU_MSG(fmt, args...) \

7
src/gallium/drivers/nv40/nv40_fragprog.c
View file

@ -938,9 +938,10 @@ nv40_fragprog_validate(struct nv40_context *nv40)
so = so_new(4, 1);
so_method(so, nv40->screen->curie, NV40TCL_FP_ADDRESS, 1);
so_reloc (so, fp->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
NV40TCL_FP_ADDRESS_DMA0, NV40TCL_FP_ADDRESS_DMA1);
so_reloc (so, nouveau_bo(fp->buffer), 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_GART | NOUVEAU_BO_RD | NOUVEAU_BO_LOW |
NOUVEAU_BO_OR, NV40TCL_FP_ADDRESS_DMA0,
NV40TCL_FP_ADDRESS_DMA1);
so_method(so, nv40->screen->curie, NV40TCL_FP_CONTROL, 1);
so_data (so, fp->fp_control);
so_ref(so, &fp->so);

7
src/gallium/drivers/nv40/nv40_fragtex.c
View file

@ -62,6 +62,7 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
{
struct nv40_sampler_state *ps = nv40->tex_sampler[unit];
struct nv40_miptree *nv40mt = nv40->tex_miptree[unit];
struct nouveau_bo *bo = nouveau_bo(nv40mt->buffer);
struct pipe_texture *pt = &nv40mt->base;
struct nv40_texture_format *tf;
struct nouveau_stateobj *so;
@ -108,9 +109,9 @@ nv40_fragtex_build(struct nv40_context *nv40, int unit)
so = so_new(16, 2);
so_method(so, nv40->screen->curie, NV40TCL_TEX_OFFSET(unit), 8);
so_reloc (so, nv40mt->buffer, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, nv40mt->buffer, txf, tex_flags | NOUVEAU_BO_OR,
NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1);
so_reloc (so, bo, 0, tex_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, bo, txf, tex_flags | NOUVEAU_BO_OR,
NV40TCL_TEX_FORMAT_DMA0, NV40TCL_TEX_FORMAT_DMA1);
so_data (so, ps->wrap);
so_data (so, NV40TCL_TEX_ENABLE_ENABLE | ps->en);
so_data (so, txs);

4
src/gallium/drivers/nv40/nv40_state_fb.c
View file

@ -2,12 +2,14 @@
#include "nouveau/nouveau_util.h"
static struct pipe_buffer *
nv40_surface_buffer(struct pipe_surface *surface)
nv40_do_surface_buffer(struct pipe_surface *surface)
{
struct nv40_miptree *mt = (struct nv40_miptree *)surface->texture;
return mt->buffer;
}
#define nv40_surface_buffer(ps) nouveau_bo(nv40_do_surface_buffer(ps))
static boolean
nv40_state_framebuffer_validate(struct nv40_context *nv40)
{

13
src/gallium/drivers/nv40/nv40_vbo.c
View file

@ -519,17 +519,20 @@ nv40_vbo_validate(struct nv40_context *nv40)
return FALSE;
}
so_reloc(vtxbuf, vb->buffer, vb->buffer_offset + ve->src_offset,
vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
0, NV40TCL_VTXBUF_ADDRESS_DMA1);
so_reloc(vtxbuf, nouveau_bo(vb->buffer),
vb->buffer_offset + ve->src_offset,
vb_flags | NOUVEAU_BO_LOW | NOUVEAU_BO_OR,
0, NV40TCL_VTXBUF_ADDRESS_DMA1);
so_data (vtxfmt, ((vb->stride << NV40TCL_VTXFMT_STRIDE_SHIFT) |
(ncomp << NV40TCL_VTXFMT_SIZE_SHIFT) | type));
}
if (ib) {
struct nouveau_bo *bo = nouveau_bo(ib);
so_method(vtxbuf, curie, NV40TCL_IDXBUF_ADDRESS, 2);
so_reloc (vtxbuf, ib, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (vtxbuf, ib, ib_format, vb_flags | NOUVEAU_BO_OR,
so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR,
0, NV40TCL_IDXBUF_FORMAT_DMA1);
}

2
src/gallium/drivers/nv50/nv50_context.h
View file

@ -23,6 +23,8 @@
#define NOUVEAU_MSG(fmt, args...) \
fprintf(stderr, "nouveau: "fmt, ##args);
#define nouveau_bo(pb) nv50->screen->nvws->get_bo(pb)
/* Constant buffer assignment */
#define NV50_CB_PMISC 0
#define NV50_CB_PVP 1

31
src/gallium/drivers/nv50/nv50_program.c
View file

@ -2288,15 +2288,15 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p)
{
struct nouveau_channel *chan = nv50->screen->nvws->channel;
struct nouveau_grobj *tesla = nv50->screen->tesla;
struct pipe_screen *screen = nv50->pipe.screen;
struct nv50_program_exec *e;
struct nouveau_stateobj *so;
const unsigned flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_WR;
unsigned start, count, *up, *ptr;
boolean upload = FALSE;
if (!p->buffer) {
p->buffer = screen->buffer_create(screen, 0x100, 0, p->exec_size * 4);
if (!p->bo) {
nouveau_bo_new(chan->device, NOUVEAU_BO_VRAM, 0x100,
p->exec_size * 4, &p->bo);
upload = TRUE;
}
@ -2345,8 +2345,8 @@ nv50_program_validate_code(struct nv50_context *nv50, struct nv50_program *p)
so = so_new(4,2);
so_method(so, nv50->screen->tesla, 0x1280, 3);
so_reloc (so, p->buffer, 0, flags | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, p->buffer, 0, flags | NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, p->bo, 0, flags | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, p->bo, 0, flags | NOUVEAU_BO_LOW, 0, 0);
so_data (so, (NV50_CB_PUPLOAD << 16) | 0x0800); //(p->exec_size * 4));
start = 0; count = p->exec_size;
@ -2394,10 +2394,10 @@ nv50_vertprog_validate(struct nv50_context *nv50)
so = so_new(13, 2);
so_method(so, tesla, NV50TCL_VP_ADDRESS_HIGH, 2);
so_reloc (so, p->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, p->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, tesla, 0x1650, 2);
so_data (so, p->cfg.vp.attr[0]);
so_data (so, p->cfg.vp.attr[1]);
@ -2431,10 +2431,10 @@ nv50_fragprog_validate(struct nv50_context *nv50)
so = so_new(64, 2);
so_method(so, tesla, NV50TCL_FP_ADDRESS_HIGH, 2);
so_reloc (so, p->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, p->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_LOW, 0, 0);
so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_HIGH, 0, 0);
so_reloc (so, p->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
NOUVEAU_BO_LOW, 0, 0);
so_method(so, tesla, 0x1904, 4);
so_data (so, p->cfg.fp.regs[0]); /* 0x01000404 / 0x00040404 */
so_data (so, 0x00000004);
@ -2461,8 +2461,6 @@ nv50_fragprog_validate(struct nv50_context *nv50)
void
nv50_program_destroy(struct nv50_context *nv50, struct nv50_program *p)
{
struct pipe_screen *pscreen = nv50->pipe.screen;
while (p->exec_head) {
struct nv50_program_exec *e = p->exec_head;
@ -2472,8 +2470,7 @@ nv50_program_destroy(struct nv50_context *nv50, struct nv50_program *p)
p->exec_tail = NULL;
p->exec_size = 0;
if (p->buffer)
pipe_buffer_reference(&p->buffer, NULL);
nouveau_bo_ref(NULL, &p->bo);
nv50->screen->nvws->res_free(&p->data[0]);
nv50->screen->nvws->res_free(&p->data[1]);

2
src/gallium/drivers/nv50/nv50_program.h
View file

@ -27,7 +27,7 @@ struct nv50_program {
struct nouveau_resource *data[2];
unsigned data_start[2];
struct pipe_buffer *buffer;
struct nouveau_bo *bo;
float *immd;
unsigned immd_nr;

42
src/gallium/drivers/nv50/nv50_screen.c
View file

@ -160,10 +160,11 @@ struct pipe_screen *
nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
{
struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
struct nouveau_device *dev = nvws->channel->device;
struct nouveau_stateobj *so;
unsigned tesla_class = 0, ret;
unsigned chipset = nvws->channel->device->chipset;
int i;
unsigned chipset = dev->chipset;
unsigned tesla_class = 0;
int ret, i;
if (!screen)
return NULL;
@ -291,14 +292,21 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
so_data (so, 8);
/* constant buffers for immediates and VP/FP parameters */
screen->constbuf_misc[0] =
screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4);
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 128*4*4,
&screen->constbuf_misc[0]);
if (ret) {
nv50_screen_destroy(&screen->pipe);
return NULL;
}
screen->constbuf_parm[0] =
screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4);
screen->constbuf_parm[1] =
screen->pipe.buffer_create(&screen->pipe, 0, 0, 128 * 4 * 4);
for (i = 0; i < 2; i++) {
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 128*4*4,
&screen->constbuf_parm[i]);
if (ret) {
nv50_screen_destroy(&screen->pipe);
return NULL;
}
}
if (nvws->res_init(&screen->immd_heap[0], 0, 128) ||
nvws->res_init(&screen->parm_heap[0], 0, 128) ||
@ -352,7 +360,12 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
* blocks. At some point we *may* want to go the NVIDIA way of doing
* things?
*/
screen->tic = screen->pipe.buffer_create(&screen->pipe, 0, 0, 32 * 8 * 4);
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 32*8*4, &screen->tic);
if (ret) {
nv50_screen_destroy(&screen->pipe);
return NULL;
}
so_method(so, screen->tesla, 0x1280, 3);
so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
@ -366,7 +379,12 @@ nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
so_data (so, 0x00000800);
screen->tsc = screen->pipe.buffer_create(&screen->pipe, 0, 0, 32 * 8 * 4);
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 0, 32*8*4, &screen->tsc);
if (ret) {
nv50_screen_destroy(&screen->pipe);
return NULL;
}
so_method(so, screen->tesla, 0x1280, 3);
so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);

8
src/gallium/drivers/nv50/nv50_screen.h
View file

@ -15,14 +15,14 @@ struct nv50_screen {
struct nouveau_grobj *m2mf;
struct nouveau_notifier *sync;
struct pipe_buffer *constbuf_misc[1];
struct pipe_buffer *constbuf_parm[2];
struct nouveau_bo *constbuf_misc[1];
struct nouveau_bo *constbuf_parm[2];
struct nouveau_resource *immd_heap[1];
struct nouveau_resource *parm_heap[2];
struct pipe_buffer *tic;
struct pipe_buffer *tsc;
struct nouveau_bo *tic;
struct nouveau_bo *tsc;
struct nouveau_stateobj *static_init;
};

24
src/gallium/drivers/nv50/nv50_state_validate.c
View file

@ -32,6 +32,8 @@ nv50_state_validate_fb(struct nv50_context *nv50)
unsigned i, w, h, gw = 0;
for (i = 0; i < fb->nr_cbufs; i++) {
struct nouveau_bo *bo = nouveau_bo(nv50_surface_buffer(fb->cbufs[i]));
if (!gw) {
w = fb->cbufs[i]->width;
h = fb->cbufs[i]->height;
@ -46,12 +48,10 @@ nv50_state_validate_fb(struct nv50_context *nv50)
so_data (so, fb->cbufs[i]->height);
so_method(so, tesla, NV50TCL_RT_ADDRESS_HIGH(i), 5);
so_reloc (so, nv50_surface_buffer(fb->cbufs[i]), fb->cbufs[i]->offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH |
NOUVEAU_BO_RDWR, 0, 0);
so_reloc (so, nv50_surface_buffer(fb->cbufs[i]), fb->cbufs[i]->offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
NOUVEAU_BO_RDWR, 0, 0);
so_reloc (so, bo, fb->cbufs[i]->offset, NOUVEAU_BO_VRAM |
NOUVEAU_BO_HIGH | NOUVEAU_BO_RDWR, 0, 0);
so_reloc (so, bo, fb->cbufs[i]->offset, NOUVEAU_BO_VRAM |
NOUVEAU_BO_LOW | NOUVEAU_BO_RDWR, 0, 0);
switch (fb->cbufs[i]->format) {
case PIPE_FORMAT_A8R8G8B8_UNORM:
so_data(so, 0xcf);
@ -73,6 +73,8 @@ nv50_state_validate_fb(struct nv50_context *nv50)
}
if (fb->zsbuf) {
struct nouveau_bo *bo = nouveau_bo(nv50_surface_buffer(fb->zsbuf));
if (!gw) {
w = fb->zsbuf->width;
h = fb->zsbuf->height;
@ -83,12 +85,10 @@ nv50_state_validate_fb(struct nv50_context *nv50)
}
so_method(so, tesla, NV50TCL_ZETA_ADDRESS_HIGH, 5);
so_reloc (so, nv50_surface_buffer(fb->zsbuf), fb->zsbuf->offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_HIGH |
NOUVEAU_BO_RDWR, 0, 0);
so_reloc (so, nv50_surface_buffer(fb->zsbuf), fb->zsbuf->offset,
NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
NOUVEAU_BO_RDWR, 0, 0);
so_reloc (so, bo, fb->zsbuf->offset, NOUVEAU_BO_VRAM |
NOUVEAU_BO_HIGH | NOUVEAU_BO_RDWR, 0, 0);
so_reloc (so, bo, fb->zsbuf->offset, NOUVEAU_BO_VRAM |
NOUVEAU_BO_LOW | NOUVEAU_BO_RDWR, 0, 0);
switch (fb->zsbuf->format) {
case PIPE_FORMAT_Z24S8_UNORM:
so_data(so, 0x16);

9
src/gallium/drivers/nv50/nv50_tex.c
View file

@ -26,8 +26,11 @@
#include "nouveau/nouveau_stateobj.h"
static int
nv50_tex_construct(struct nouveau_stateobj *so, struct nv50_miptree *mt)
nv50_tex_construct(struct nv50_context *nv50, struct nouveau_stateobj *so,
struct nv50_miptree *mt)
{
struct nouveau_bo *bo = nouveau_bo(mt->buffer);
switch (mt->base.format) {
case PIPE_FORMAT_A8R8G8B8_UNORM:
so_data(so, NV50TIC_0_0_MAPA_C3 | NV50TIC_0_0_TYPEA_UNORM |
@ -117,7 +120,7 @@ nv50_tex_construct(struct nouveau_stateobj *so, struct nv50_miptree *mt)
return 1;
}
so_reloc(so, mt->buffer, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
so_reloc(so, bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_LOW |
NOUVEAU_BO_RD, 0, 0);
so_data (so, 0xd0005000);
so_data (so, 0x00300000);
@ -144,7 +147,7 @@ nv50_tex_validate(struct nv50_context *nv50)
for (unit = 0; unit < nv50->miptree_nr; unit++) {
struct nv50_miptree *mt = nv50->miptree[unit];
if (nv50_tex_construct(so, mt)) {
if (nv50_tex_construct(nv50, so, mt)) {
NOUVEAU_ERR("failed tex validate\n");
so_ref(NULL, &so);
return;

5
src/gallium/drivers/nv50/nv50_vbo.c
View file

@ -212,6 +212,7 @@ nv50_vbo_validate(struct nv50_context *nv50)
struct pipe_vertex_element *ve = &nv50->vtxelt[i];
struct pipe_vertex_buffer *vb =
&nv50->vtxbuf[ve->vertex_buffer_index];
struct nouveau_bo *bo = nouveau_bo(vb->buffer);
switch (ve->src_format) {
case PIPE_FORMAT_R32G32B32A32_FLOAT:
@ -240,10 +241,10 @@ nv50_vbo_validate(struct nv50_context *nv50)
so_method(vtxbuf, tesla, 0x900 + (i * 16), 3);
so_data (vtxbuf, 0x20000000 | vb->stride);
so_reloc (vtxbuf, vb->buffer, vb->buffer_offset +
so_reloc (vtxbuf, bo, vb->buffer_offset +
ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
so_reloc (vtxbuf, vb->buffer, vb->buffer_offset +
so_reloc (vtxbuf, bo, vb->buffer_offset +
ve->src_offset, NOUVEAU_BO_VRAM | NOUVEAU_BO_GART |
NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
}