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tu/a7xx: Zero out A7XX_VPC_PRIMITIVE_CNTL_0 in 3d blits

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Same as we are doing with A6XX_PC_PRIMITIVE_CNTL_0.
No issues were seen but it should be a right thing to do.

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25918>
This commit is contained in:
Danylo Piliaiev 2023-10-26 17:15:19 +02:00 • committed by Marge Bot
parent cdbb8b5412
commit 069797c708
1 changed files with 3 additions and 0 deletions
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3
src/freedreno/vulkan/tu_clear_blit.cc
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@ -839,6 +839,9 @@ r3d_common(struct tu_cmd_buffer *cmd, struct tu_cs *cs, bool blit,
tu6_emit_xs(cs, MESA_SHADER_FRAGMENT, fs, &pvtmem, fs_iova);
tu_cs_emit_regs(cs, A6XX_PC_PRIMITIVE_CNTL_0());
if (CHIP == A7XX) {
tu_cs_emit_regs(cs, A7XX_VPC_PRIMITIVE_CNTL_0());
}
tu6_emit_vpc<CHIP>(cs, vs, NULL, NULL, NULL, fs);