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radeonsi: also wait for SDMA in the clear_buffer CPU fallback

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Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
This commit is contained in:
Marek Olšák 2016-12-29 19:00:43 +01:00
parent f6a1c2d883
commit 067a3237b9
1 changed files with 2 additions and 3 deletions
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5
src/gallium/drivers/radeonsi/si_cp_dma.c
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@ -184,9 +184,8 @@ static void si_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
/* Fallback for unaligned clears. */
if (offset % 4 != 0 || size % 4 != 0) {
uint8_t *map = sctx->b.ws->buffer_map(r600_resource(dst)->buf,
sctx->b.gfx.cs,
PIPE_TRANSFER_WRITE);
uint8_t *map = r600_buffer_map_sync_with_rings(&sctx->b, rdst,
PIPE_TRANSFER_WRITE);
map += offset;
for (uint64_t i = 0; i < size; i++) {
unsigned byte_within_dword = (offset + i) % 4;