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https://gitlab.freedesktop.org/mesa/mesa.git
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anv/meta: Create 8 pipelines for color clears
This prepares for moving the clear ops from the start of the render pass into each subpass. Pipeline N will be used to clear color attachment N of the current subpass. Currently meta color clears still create a throwaway subpass with exactly one attachment, so currently only pipeline 0 is used. This is an ugly hack to workaround the compiler's current inability to dynamically set the render target index in the render target write message.
This commit is contained in:
Chad Versace
parent
2997b0da4a
commit
0679bef49f
2 changed files with 68 additions and 25 deletions
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@ -61,7 +61,8 @@ meta_clear_end(struct anv_meta_saved_state *saved_state,
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static void
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build_color_shaders(struct nir_shader **out_vs,
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struct nir_shader **out_fs)
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struct nir_shader **out_fs,
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uint32_t frag_output)
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{
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nir_builder vs_b;
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nir_builder fs_b;
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@ -105,7 +106,7 @@ build_color_shaders(struct nir_shader **out_vs,
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nir_variable *fs_out_color =
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nir_variable_create(fs_b.shader, nir_var_shader_out, color_type,
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"f_color");
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fs_out_color->data.location = FRAG_RESULT_DATA0;
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fs_out_color->data.location = FRAG_RESULT_DATA0 + frag_output;
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nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
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nir_copy_var(&vs_b, vs_out_color, vs_in_color);
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@ -123,6 +124,7 @@ create_pipeline(struct anv_device *device,
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const VkPipelineDepthStencilStateCreateInfo *ds_state,
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const VkPipelineColorBlendStateCreateInfo *cb_state,
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const VkAllocationCallbacks *alloc,
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bool use_repclear,
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struct anv_pipeline **pipeline)
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{
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VkDevice device_h = anv_device_to_handle(device);
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@ -208,7 +210,7 @@ create_pipeline(struct anv_device *device,
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},
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&(struct anv_graphics_pipeline_create_info) {
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.color_attachment_count = MAX_RTS,
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.use_repclear = true,
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.use_repclear = use_repclear,
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.disable_viewport = true,
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.disable_vs = true,
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.use_rectlist = true
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@ -225,11 +227,12 @@ create_pipeline(struct anv_device *device,
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}
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static VkResult
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init_color_pipeline(struct anv_device *device)
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create_color_pipeline(struct anv_device *device, uint32_t frag_output,
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struct anv_pipeline **pipeline)
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{
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struct nir_shader *vs_nir;
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struct nir_shader *fs_nir;
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build_color_shaders(&vs_nir, &fs_nir);
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build_color_shaders(&vs_nir, &fs_nir, frag_output);
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const VkPipelineVertexInputStateCreateInfo vi_state = {
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.sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
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@ -290,10 +293,44 @@ init_color_pipeline(struct anv_device *device)
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},
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};
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/* Disable repclear because we do not want the compiler to replace the
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* shader. We need the shader to write to the specified color attachment,
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* but the repclear shader writes to all color attachments.
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*/
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return
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create_pipeline(device, vs_nir, fs_nir, &vi_state, &ds_state,
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&cb_state, NULL,
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&device->meta_state.clear.color_pipeline);
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&cb_state, NULL, /*use_repclear*/ false,
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pipeline);
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}
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static VkResult
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init_color_pipelines(struct anv_device *device)
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{
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VkResult result;
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struct anv_pipeline **pipelines = device->meta_state.clear.color_pipelines;
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uint32_t n = ARRAY_SIZE(device->meta_state.clear.color_pipelines);
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zero(device->meta_state.clear.color_pipelines);
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for (uint32_t i = 0; i < n; ++i) {
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result = create_color_pipeline(device, i, &pipelines[i]);
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if (result < 0)
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goto fail;
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}
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return VK_SUCCESS;
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fail:
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for (uint32_t i = 0; i < n; ++i) {
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if (pipelines[i] == NULL)
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break;
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anv_DestroyPipeline(anv_device_to_handle(device),
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anv_pipeline_to_handle(pipelines[i]),
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NULL);
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}
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return result;
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}
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static void
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@ -304,8 +341,8 @@ emit_color_clear(struct anv_cmd_buffer *cmd_buffer,
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struct anv_device *device = cmd_buffer->device;
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VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
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const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
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VkPipeline pipeline_h =
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anv_pipeline_to_handle(device->meta_state.clear.color_pipeline);
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struct anv_pipeline *pipeline = device->meta_state.clear.color_pipelines[0];
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VkPipeline pipeline_h = anv_pipeline_to_handle(pipeline);
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const struct color_clear_vattrs vertex_data[3] = {
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{
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@ -366,7 +403,7 @@ emit_color_clear(struct anv_cmd_buffer *cmd_buffer,
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(VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
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(VkDeviceSize[]) { 0 });
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if (cmd_buffer->state.pipeline != device->meta_state.clear.color_pipeline) {
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if (cmd_buffer->state.pipeline != pipeline) {
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ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
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pipeline_h);
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}
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@ -469,7 +506,7 @@ create_depthstencil_pipeline(struct anv_device *device,
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};
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return create_pipeline(device, vs_nir, fs_nir, &vi_state, &ds_state,
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&cb_state, NULL, pipeline);
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&cb_state, NULL, /*use_repclear*/ true, pipeline);
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}
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static void
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@ -612,22 +649,15 @@ anv_device_init_meta_clear_state(struct anv_device *device)
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{
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VkResult result;
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result = init_color_pipeline(device);
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result = init_color_pipelines(device);
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if (result != VK_SUCCESS)
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goto fail;
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return result;
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result = init_depthstencil_pipelines(device);
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if (result != VK_SUCCESS)
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goto fail_color_pipeline;
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return result;
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return VK_SUCCESS;
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fail_color_pipeline:
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anv_DestroyPipeline(anv_device_to_handle(device),
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anv_pipeline_to_handle(device->meta_state.clear.color_pipeline),
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NULL);
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fail:
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return result;
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}
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void
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@ -635,9 +665,13 @@ anv_device_finish_meta_clear_state(struct anv_device *device)
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{
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VkDevice device_h = anv_device_to_handle(device);
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ANV_CALL(DestroyPipeline)(device_h,
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anv_pipeline_to_handle(device->meta_state.clear.color_pipeline),
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NULL);
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for (uint32_t i = 0;
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i < ARRAY_SIZE(device->meta_state.clear.color_pipelines); ++i) {
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ANV_CALL(DestroyPipeline)(device_h,
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anv_pipeline_to_handle(device->meta_state.clear.color_pipelines[i]),
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NULL);
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}
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ANV_CALL(DestroyPipeline)(device_h,
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anv_pipeline_to_handle(device->meta_state.clear.depth_only_pipeline),
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NULL);
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@ -563,7 +563,16 @@ void anv_finish_wsi(struct anv_instance *instance);
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struct anv_meta_state {
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struct {
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struct anv_pipeline *color_pipeline;
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/**
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* Pipeline N is used to clear color attachment N of the current
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* subpass.
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*
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* HACK: We use one pipeline per color attachment to work around the
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* compiler's inability to dynamically set the render target index of
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* the render target write message.
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*/
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struct anv_pipeline *color_pipelines[MAX_RTS];
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struct anv_pipeline *depth_only_pipeline;
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struct anv_pipeline *stencil_only_pipeline;
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struct anv_pipeline *depthstencil_pipeline;
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