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freedreno/decode: Use info->chip to decode

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Use the chip generation in cases where decoding is generation specific,
rather than range testing gpu_id.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/9310
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/25333>
This commit is contained in:
Rob Clark 2023-09-20 17:06:02 -07:00 • committed by Marge Bot
parent ebdac80b0d
commit 066f80e31c
3 changed files with 50 additions and 49 deletions
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89
src/freedreno/decode/cffdec.c
View file

@ -61,7 +61,7 @@ static int vertices;
static inline unsigned
regcnt(void)
{
if (options->gpu_id >= 500)
if (options->info->chip >= 5)
return 0xffff;
else
return 0x7fff;
@ -70,7 +70,7 @@ regcnt(void)
static int
is_64b(void)
{
return options->gpu_id >= 500;
return options->info->chip >= 5;
}
static int draws[4];
@ -449,7 +449,7 @@ disasm_gpuaddr(const char *name, uint64_t gpuaddr, int level)
const char *ext;
dump_hex(buf, min(64, sizedwords), level + 1);
try_disasm_a3xx(buf, sizedwords, level + 2, stdout, options->gpu_id);
try_disasm_a3xx(buf, sizedwords, level + 2, stdout, options->info->chip * 100);
/* this is a bit ugly way, but oh well.. */
if (strstr(name, "SP_VS_OBJ")) {
@ -779,35 +779,36 @@ cffdec_init(const struct cffdec_options *_options)
reset_regs();
draw_count = 0;
/* TODO we need an API to free/cleanup any previous rnn */
if (!options->info)
return;
switch (options->gpu_id) {
case 200 ... 299:
switch (options->info->chip) {
case 2:
type0_reg = reg_a2xx;
init_rnn("a2xx");
break;
case 300 ... 399:
case 3:
type0_reg = reg_a3xx;
init_rnn("a3xx");
break;
case 400 ... 499:
case 4:
type0_reg = reg_a4xx;
init_rnn("a4xx");
break;
case 500 ... 599:
case 5:
type0_reg = reg_a5xx;
init_rnn("a5xx");
break;
case 600 ... 699:
case 6:
type0_reg = reg_a6xx;
init_rnn("a6xx");
break;
case 700 ... 799:
case 7:
type0_reg = reg_a7xx;
init_rnn("a7xx");
break;
default:
errx(-1, "unsupported gpu: %u", options->gpu_id);
errx(-1, "unsupported generation: %u", options->info->chip);
}
}
@ -901,12 +902,12 @@ dump_register_val(struct regacc *r, int level)
* would be some special annotation in the xml..
* for a6xx use "address" and "waddress" types
*/
if (options->gpu_id >= 600) {
if (options->info->chip >= 6) {
if (!strcmp(info->typeinfo->name, "address") ||
!strcmp(info->typeinfo->name, "waddress")) {
gpuaddr = r->value;
}
} else if (options->gpu_id >= 500) {
} else if (options->info->chip >= 5) {
/* TODO we shouldn't rely on reg_val() since reg_set() might
* not have been called yet for the other half of the 64b reg.
* We can remove this hack once a5xx.xml is converted to reg64
@ -1050,7 +1051,7 @@ static bool skip_ib2_enable_local;
static void
print_mode(int level)
{
if ((options->gpu_id >= 500) && !quiet(2)) {
if ((options->info->chip >= 5) && !quiet(2)) {
printf("%smode: %s", levels[level], render_mode);
if (thread)
printf(":%s", thread);
@ -1099,7 +1100,7 @@ __do_query(const char *primtype, uint32_t num_indices)
{
int n = 0;
if ((500 <= options->gpu_id) && (options->gpu_id < 700)) {
if ((5 <= options->info->chip) && (options->info->chip < 7)) {
uint32_t scissor_tl = reg_val(regbase("GRAS_SC_WINDOW_SCISSOR_TL"));
uint32_t scissor_br = reg_val(regbase("GRAS_SC_WINDOW_SCISSOR_BR"));
@ -1123,7 +1124,7 @@ __do_query(const char *primtype, uint32_t num_indices)
printf("%4d: %s(%u,%u-%u,%u):%u:", draw_count, primtype, bin_x1,
bin_y1, bin_x2, bin_y2, num_indices);
if (options->gpu_id >= 500)
if (options->info->chip >= 5)
printf("%s:", render_mode);
if (thread)
printf("%s:", thread);
@ -1442,19 +1443,19 @@ dump_tex_samp(uint32_t *texsamp, enum state_src_t src, int num_unit, int level)
if ((num_unit == 16) && (texsamp[0] == 0) && (texsamp[1] == 0))
break;
if ((300 <= options->gpu_id) && (options->gpu_id < 400)) {
if (options->info->chip == 3) {
dump_domain(texsamp, 2, level + 2, "A3XX_TEX_SAMP");
dump_hex(texsamp, 2, level + 1);
texsamp += 2;
} else if ((400 <= options->gpu_id) && (options->gpu_id < 500)) {
} else if (options->info->chip == 4) {
dump_domain(texsamp, 2, level + 2, "A4XX_TEX_SAMP");
dump_hex(texsamp, 2, level + 1);
texsamp += 2;
} else if ((500 <= options->gpu_id) && (options->gpu_id < 600)) {
} else if (options->info->chip == 5) {
dump_domain(texsamp, 4, level + 2, "A5XX_TEX_SAMP");
dump_hex(texsamp, 4, level + 1);
texsamp += 4;
} else if ((600 <= options->gpu_id) && (options->gpu_id < 800)) {
} else if ((6 <= options->info->chip) && (options->info->chip < 8)) {
dump_domain(texsamp, 4, level + 2, "A6XX_TEX_SAMP");
dump_hex(texsamp, 4, level + 1);
texsamp += src == STATE_SRC_BINDLESS ? 16 : 4;
@ -1473,11 +1474,11 @@ dump_tex_const(uint32_t *texconst, int num_unit, int level)
(texconst[2] == 0) && (texconst[3] == 0))
break;
if ((300 <= options->gpu_id) && (options->gpu_id < 400)) {
if (options->info->chip == 3) {
dump_domain(texconst, 4, level + 2, "A3XX_TEX_CONST");
dump_hex(texconst, 4, level + 1);
texconst += 4;
} else if ((400 <= options->gpu_id) && (options->gpu_id < 500)) {
} else if (options->info->chip == 4) {
dump_domain(texconst, 8, level + 2, "A4XX_TEX_CONST");
if (options->dump_textures) {
uint32_t addr = texconst[4] & ~0x1f;
@ -1485,7 +1486,7 @@ dump_tex_const(uint32_t *texconst, int num_unit, int level)
}
dump_hex(texconst, 8, level + 1);
texconst += 8;
} else if ((500 <= options->gpu_id) && (options->gpu_id < 600)) {
} else if (options->info->chip == 5) {
dump_domain(texconst, 12, level + 2, "A5XX_TEX_CONST");
if (options->dump_textures) {
uint64_t addr =
@ -1494,7 +1495,7 @@ dump_tex_const(uint32_t *texconst, int num_unit, int level)
}
dump_hex(texconst, 12, level + 1);
texconst += 12;
} else if ((600 <= options->gpu_id) && (options->gpu_id < 800)) {
} else if ((6 <= options->info->chip) && (options->info->chip < 8)) {
dump_domain(texconst, 16, level + 2, "A6XX_TEX_CONST");
if (options->dump_textures) {
uint64_t addr =
@ -1521,9 +1522,9 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level)
if (quiet(2) && !options->script)
return;
if (options->gpu_id >= 600)
if (options->info->chip >= 6)
a6xx_get_state_type(dwords, &stage, &state, &src);
else if (options->gpu_id >= 400)
else if (options->info->chip >= 4)
a4xx_get_state_type(dwords, &stage, &state, &src);
else
a3xx_get_state_type(dwords, &stage, &state, &src);
@ -1575,9 +1576,9 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level)
if (quiet(2))
return;
if (options->gpu_id >= 400)
if (options->info->chip >= 4)
num_unit *= 16;
else if (options->gpu_id >= 300)
else if (options->info->chip >= 3)
num_unit *= 4;
/* shaders:
@ -1597,7 +1598,7 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level)
if (contents)
try_disasm_a3xx(contents, num_unit * 2, level + 2, stdout,
options->gpu_id);
options->info->chip * 100);
/* dump raw shader: */
if (ext)
@ -1614,7 +1615,7 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level)
* note: num_unit seems to be # of pairs of dwords??
*/
if (options->gpu_id >= 400)
if (options->info->chip >= 4)
num_unit *= 2;
dump_float(contents, num_unit * 2, level + 1);
@ -1652,11 +1653,11 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level)
for (i = 0; i < num_unit; i++) {
int sz = 4;
if (400 <= options->gpu_id && options->gpu_id < 500) {
if (options->info->chip == 4) {
dump_domain(ssboconst, 4, level + 2, "A4XX_SSBO_0");
} else if (500 <= options->gpu_id && options->gpu_id < 600) {
} else if (options->info->chip == 5) {
dump_domain(ssboconst, 4, level + 2, "A5XX_SSBO_0");
} else if (600 <= options->gpu_id && options->gpu_id < 800) {
} else if ((6 <= options->info->chip) && (options->info->chip < 8)) {
sz = 16;
dump_domain(ssboconst, 16, level + 2, "A6XX_TEX_CONST");
}
@ -1669,9 +1670,9 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level)
uint32_t *ssboconst = (uint32_t *)contents;
for (i = 0; i < num_unit; i++) {
if (400 <= options->gpu_id && options->gpu_id < 500)
if (options->info->chip == 4)
dump_domain(ssboconst, 2, level + 2, "A4XX_SSBO_1");
else if (500 <= options->gpu_id && options->gpu_id < 600)
else if (options->info->chip == 5)
dump_domain(ssboconst, 2, level + 2, "A5XX_SSBO_1");
dump_hex(ssboconst, 2, level + 1);
ssboconst += 2;
@ -1683,7 +1684,7 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level)
for (i = 0; i < num_unit; i++) {
/* TODO a4xx and a5xx might be same: */
if ((500 <= options->gpu_id) && (options->gpu_id < 600)) {
if (options->info->chip == 5) {
dump_domain(ssboconst, 2, level + 2, "A5XX_SSBO_2");
dump_hex(ssboconst, 2, level + 1);
}
@ -1701,9 +1702,9 @@ cp_load_state(uint32_t *dwords, uint32_t sizedwords, int level)
for (i = 0; i < num_unit; i++) {
// TODO probably similar on a4xx..
if (500 <= options->gpu_id && options->gpu_id < 600)
if (options->info->chip == 5)
dump_domain(uboconst, 2, level + 2, "A5XX_UBO");
else if (600 <= options->gpu_id && options->gpu_id < 700)
else if (options->info->chip == 6)
dump_domain(uboconst, 2, level + 2, "A6XX_UBO");
dump_hex(uboconst, 2, level + 1);
uboconst += src == STATE_SRC_BINDLESS ? 16 : 2;
@ -1902,7 +1903,7 @@ cp_event_write(uint32_t *dwords, uint32_t sizedwords, int level)
const char *name = rnn_enumname(rnn, "vgt_event_type", dwords[0]);
printl(2, "%sevent %s\n", levels[level], name);
if (name && (options->gpu_id > 500)) {
if (name && (options->info->chip > 5)) {
char eventname[64];
snprintf(eventname, sizeof(eventname), "EVENT:%s", name);
if (!strcmp(name, "BLIT")) {
@ -2532,7 +2533,7 @@ load_group(unsigned group_id, int level)
printl(2, "%saddr: %016llx\n", levels[level], ds->addr);
printl(2, "%sflags: %x\n", levels[level], ds->flags);
if (options->gpu_id >= 600) {
if (options->info->chip >= 6) {
printl(2, "%senable_mask: 0x%x\n", levels[level], ds->enable_mask);
if (!(ds->enable_mask & enable_mask)) {
@ -2717,7 +2718,7 @@ cp_set_render_mode(uint32_t *dwords, uint32_t sizedwords, int level)
*
*/
assert(options->gpu_id >= 500);
assert(options->info->chip >= 5);
render_mode = rnn_enumname(rnn, "render_mode_cmd", dwords[0]);
@ -2762,7 +2763,7 @@ cp_compute_checkpoint(uint32_t *dwords, uint32_t sizedwords, int level)
uint32_t *ptr, len;
assert(is_64b());
assert(options->gpu_id >= 500);
assert(options->info->chip >= 5);
if (sizedwords == 8) {
addr = dwords[5];
@ -3053,7 +3054,7 @@ dump_commands(uint32_t *dwords, uint32_t sizedwords, int level)
printf("bad type! %08x\n", dwords[0]);
/* for 5xx+ we can do a passable job of looking for start of next valid
* packet: */
if (options->gpu_id >= 500) {
if (options->info->chip >= 5) {
count = find_next_packet(dwords, dwords_left);
} else {
return;

4
src/freedreno/decode/crashdec.c
View file

@ -325,7 +325,7 @@ decode_gmu_hfi(void)
static bool
valid_header(uint32_t pkt)
{
if (options.gpu_id >= 500) {
if (options.info->chip >= 5) {
return pkt_is_type4(pkt) || pkt_is_type7(pkt);
} else {
/* TODO maybe we can check validish looking pkt3 opc or pkt0
@ -700,7 +700,7 @@ decode_shader_blocks(void)
* (or parts of shaders?), so perhaps we should search
* for ends of shaders and decode each?
*/
try_disasm_a3xx(buf, sizedwords, 1, stdout, options.gpu_id);
try_disasm_a3xx(buf, sizedwords, 1, stdout, options.info->chip * 100);
}
if (dump)

6
src/freedreno/decode/crashdec.h
View file

@ -56,19 +56,19 @@ extern struct cffdec_options options;
static inline bool
is_a6xx(void)
{
return (600 <= options.gpu_id) && (options.gpu_id < 700);
return options.info->chip == 6;
}
static inline bool
is_a5xx(void)
{
return (500 <= options.gpu_id) && (options.gpu_id < 600);
return options.info->chip == 5;
}
static inline bool
is_64b(void)
{
return options.gpu_id >= 500;
return options.info->chip >= 5;
}
static inline bool