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Separate TGSI_OPCODE_KIL and TGSI_OPCODE_KILP (predicated).
These correspond to the NV and ARB-style fragment program KIL instructions. The former is really supposed to examine the NV condition codes but Mesa's GLSL compiler always emits unconditional KIL instructions.
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ca34912bf7
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4 changed files with 31 additions and 6 deletions
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@ -270,7 +270,7 @@ static const char *TGSI_OPCODES[] =
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"OPCODE_COS",
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"OPCODE_DDX",
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"OPCODE_DDY",
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"OPCODE_KIL",
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"OPCODE_KILP",
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"OPCODE_PK2H",
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"OPCODE_PK2US",
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"OPCODE_PK4B",
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@ -364,6 +364,7 @@ static const char *TGSI_OPCODES[] =
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"OPCODE_IFC",
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"OPCODE_BREAKC",
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"OPCODE_TXP",
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"OPCODE_KIL",
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"OPCODE_END"
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};
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@ -408,7 +409,7 @@ static const char *TGSI_OPCODES_SHORT[] =
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"COS",
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"DDX",
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"DDY",
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"KIL",
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"KILP",
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"PK2H",
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"PK2US",
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"PK4B",
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@ -502,6 +503,7 @@ static const char *TGSI_OPCODES_SHORT[] =
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"IFC",
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"BREAKC",
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"TXP",
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"KIL",
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"END"
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};
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@ -1129,8 +1129,12 @@ store_dest(
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store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
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/**
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* Execute ARB-style KIL which is predicated by a src register.
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* Kill fragment if any of the four values is less than zero.
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*/
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static void
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exec_kil (struct tgsi_exec_machine *mach,
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exec_kilp(struct tgsi_exec_machine *mach,
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const struct tgsi_full_instruction *inst)
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{
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GLuint uniquemask;
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@ -1168,6 +1172,14 @@ exec_kil (struct tgsi_exec_machine *mach,
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}
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static void
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exec_kil(struct tgsi_exec_machine *mach,
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const struct tgsi_full_instruction *inst)
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{
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/* for enabled ExecMask bits, set the killed bit */
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mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= mach->ExecMask;
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}
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/*
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@ -1782,6 +1794,10 @@ exec_instruction(
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}
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break;
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case TGSI_OPCODE_KILP:
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exec_kilp (mach, inst);
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break;
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case TGSI_OPCODE_KIL:
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exec_kil (mach, inst);
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break;
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@ -236,7 +236,7 @@ struct tgsi_immediate_float32
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#define TGSI_OPCODE_EX2 TGSI_OPCODE_EXPBASE2
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#define TGSI_OPCODE_FLR TGSI_OPCODE_FLOOR
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#define TGSI_OPCODE_FRC TGSI_OPCODE_FRAC
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#define TGSI_OPCODE_KIL 39
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#define TGSI_OPCODE_KILP 39 /* predicated kill */
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#define TGSI_OPCODE_LG2 TGSI_OPCODE_LOGBASE2
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/* TGSI_OPCODE_LIT */
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#define TGSI_OPCODE_LRP TGSI_OPCODE_LERP
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@ -1100,9 +1100,10 @@ struct tgsi_immediate_float32
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/* TGSI_OPCODE_MOVA */
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/* TGSI_OPCODE_LOGP */
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#define TGSI_OPCODE_END 133 /* aka HALT */
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#define TGSI_OPCODE_KIL 133 /* unpredicated kill */
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#define TGSI_OPCODE_END 134 /* aka HALT */
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#define TGSI_OPCODE_LAST 134
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#define TGSI_OPCODE_LAST 135
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#define TGSI_SAT_NONE 0 /* do not saturate */
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#define TGSI_SAT_ZERO_ONE 1 /* clamp to [0,1] */
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@ -336,6 +336,12 @@ compile_instruction(
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fullinst->Instruction.Opcode = TGSI_OPCODE_INT;
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break;
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case OPCODE_KIL:
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/* predicated w/ a register */
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fullinst->Instruction.Opcode = TGSI_OPCODE_KILP;
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break;
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case OPCODE_KIL_NV:
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/* unpredicated */
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assert(inst->DstReg.CondMask == COND_TR);
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fullinst->Instruction.Opcode = TGSI_OPCODE_KIL;
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break;
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case OPCODE_LG2:
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