Separate TGSI_OPCODE_KIL and TGSI_OPCODE_KILP (predicated).

These correspond to the NV and ARB-style fragment program KIL instructions.
The former is really supposed to examine the NV condition codes but Mesa's
GLSL compiler always emits unconditional KIL instructions.
This commit is contained in:
Brian 2007-10-02 17:07:30 -06:00
parent ca34912bf7
commit 066ccec494
4 changed files with 31 additions and 6 deletions

View file

@ -270,7 +270,7 @@ static const char *TGSI_OPCODES[] =
"OPCODE_COS",
"OPCODE_DDX",
"OPCODE_DDY",
"OPCODE_KIL",
"OPCODE_KILP",
"OPCODE_PK2H",
"OPCODE_PK2US",
"OPCODE_PK4B",
@ -364,6 +364,7 @@ static const char *TGSI_OPCODES[] =
"OPCODE_IFC",
"OPCODE_BREAKC",
"OPCODE_TXP",
"OPCODE_KIL",
"OPCODE_END"
};
@ -408,7 +409,7 @@ static const char *TGSI_OPCODES_SHORT[] =
"COS",
"DDX",
"DDY",
"KIL",
"KILP",
"PK2H",
"PK2US",
"PK4B",
@ -502,6 +503,7 @@ static const char *TGSI_OPCODES_SHORT[] =
"IFC",
"BREAKC",
"TXP",
"KIL",
"END"
};

View file

@ -1129,8 +1129,12 @@ store_dest(
store_dest (mach, VAL, &inst->FullDstRegisters[INDEX], inst, CHAN )
/**
* Execute ARB-style KIL which is predicated by a src register.
* Kill fragment if any of the four values is less than zero.
*/
static void
exec_kil (struct tgsi_exec_machine *mach,
exec_kilp(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
GLuint uniquemask;
@ -1168,6 +1172,14 @@ exec_kil (struct tgsi_exec_machine *mach,
}
static void
exec_kil(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst)
{
/* for enabled ExecMask bits, set the killed bit */
mach->Temps[TEMP_KILMASK_I].xyzw[TEMP_KILMASK_C].u[0] |= mach->ExecMask;
}
/*
@ -1782,6 +1794,10 @@ exec_instruction(
}
break;
case TGSI_OPCODE_KILP:
exec_kilp (mach, inst);
break;
case TGSI_OPCODE_KIL:
exec_kil (mach, inst);
break;

View file

@ -236,7 +236,7 @@ struct tgsi_immediate_float32
#define TGSI_OPCODE_EX2 TGSI_OPCODE_EXPBASE2
#define TGSI_OPCODE_FLR TGSI_OPCODE_FLOOR
#define TGSI_OPCODE_FRC TGSI_OPCODE_FRAC
#define TGSI_OPCODE_KIL 39
#define TGSI_OPCODE_KILP 39 /* predicated kill */
#define TGSI_OPCODE_LG2 TGSI_OPCODE_LOGBASE2
/* TGSI_OPCODE_LIT */
#define TGSI_OPCODE_LRP TGSI_OPCODE_LERP
@ -1100,9 +1100,10 @@ struct tgsi_immediate_float32
/* TGSI_OPCODE_MOVA */
/* TGSI_OPCODE_LOGP */
#define TGSI_OPCODE_END 133 /* aka HALT */
#define TGSI_OPCODE_KIL 133 /* unpredicated kill */
#define TGSI_OPCODE_END 134 /* aka HALT */
#define TGSI_OPCODE_LAST 134
#define TGSI_OPCODE_LAST 135
#define TGSI_SAT_NONE 0 /* do not saturate */
#define TGSI_SAT_ZERO_ONE 1 /* clamp to [0,1] */

View file

@ -336,6 +336,12 @@ compile_instruction(
fullinst->Instruction.Opcode = TGSI_OPCODE_INT;
break;
case OPCODE_KIL:
/* predicated w/ a register */
fullinst->Instruction.Opcode = TGSI_OPCODE_KILP;
break;
case OPCODE_KIL_NV:
/* unpredicated */
assert(inst->DstReg.CondMask == COND_TR);
fullinst->Instruction.Opcode = TGSI_OPCODE_KIL;
break;
case OPCODE_LG2: