mirror of
https://gitlab.freedesktop.org/mesa/mesa.git
synced 2026-01-06 11:00:11 +01:00
gallivm: move ppc denorm disable to inline
This just puts it out of the way Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/29869>
This commit is contained in:
parent
17f2ebe8d2
commit
05dd12b9a5
2 changed files with 29 additions and 21 deletions
|
|
@ -358,27 +358,7 @@ lp_build_init(void)
|
|||
|
||||
lp_set_target_options();
|
||||
|
||||
#if DETECT_ARCH_PPC_64
|
||||
/* Set the NJ bit in VSCR to 0 so denormalized values are handled as
|
||||
* specified by IEEE standard (PowerISA 2.06 - Section 6.3). This guarantees
|
||||
* that some rounding and half-float to float handling does not round
|
||||
* incorrectly to 0.
|
||||
* XXX: should eventually follow same logic on all platforms.
|
||||
* Right now denorms get explicitly disabled (but elsewhere) for x86,
|
||||
* whereas ppc64 explicitly enables them...
|
||||
*/
|
||||
if (util_get_cpu_caps()->has_altivec) {
|
||||
unsigned short mask[] = { 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
|
||||
0xFFFF, 0xFFFF, 0xFFFE, 0xFFFF };
|
||||
__asm (
|
||||
"mfvscr %%v1\n"
|
||||
"vand %0,%%v1,%0\n"
|
||||
"mtvscr %0"
|
||||
:
|
||||
: "r" (*mask)
|
||||
);
|
||||
}
|
||||
#endif
|
||||
lp_bld_ppc_disable_denorms();
|
||||
|
||||
gallivm_initialized = true;
|
||||
|
||||
|
|
|
|||
|
|
@ -32,6 +32,7 @@
|
|||
|
||||
#include "util/compiler.h"
|
||||
#include "util/u_pointer.h" // for func_pointer
|
||||
#include "util/u_cpu_detect.h"
|
||||
#include "lp_bld.h"
|
||||
#include "lp_bld_passmgr.h"
|
||||
#include <llvm-c/ExecutionEngine.h>
|
||||
|
|
@ -106,6 +107,33 @@ gallivm_jit_function(struct gallivm_state *gallivm,
|
|||
unsigned gallivm_get_perf_flags(void);
|
||||
|
||||
void lp_init_clock_hook(struct gallivm_state *gallivm);
|
||||
|
||||
static inline void
|
||||
lp_bld_ppc_disable_denorms(void)
|
||||
{
|
||||
#if DETECT_ARCH_PPC_64
|
||||
/* Set the NJ bit in VSCR to 0 so denormalized values are handled as
|
||||
* specified by IEEE standard (PowerISA 2.06 - Section 6.3). This guarantees
|
||||
* that some rounding and half-float to float handling does not round
|
||||
* incorrectly to 0.
|
||||
* XXX: should eventually follow same logic on all platforms.
|
||||
* Right now denorms get explicitly disabled (but elsewhere) for x86,
|
||||
* whereas ppc64 explicitly enables them...
|
||||
*/
|
||||
if (util_get_cpu_caps()->has_altivec) {
|
||||
unsigned short mask[] = { 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
|
||||
0xFFFF, 0xFFFF, 0xFFFE, 0xFFFF };
|
||||
__asm (
|
||||
"mfvscr %%v1\n"
|
||||
"vand %0,%%v1,%0\n"
|
||||
"mtvscr %0"
|
||||
:
|
||||
: "r" (*mask)
|
||||
);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue