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r600: fix vertex buffer size calculation

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when we dont know max_index we cannot calculate vb size from count
anymore - just use the bo size.
Also added an assert to remind that we dont handle GL_INT GL_DOUBLE
upload when we dont' know max_index - will fix later
This commit is contained in:
Andre Maasikas 2010-08-26 15:22:21 +03:00
parent 90437330e2
commit 0599509fc4
2 changed files with 2 additions and 12 deletions
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13
src/mesa/drivers/dri/r600/r700_chip.c
View file

@ -173,7 +173,6 @@ static void r700SetupVTXConstants(GLcontext * ctx,
{
context_t *context = R700_CONTEXT(ctx);
struct radeon_aos * paos = (struct radeon_aos *)pAos;
unsigned int nVBsize;
BATCH_LOCALS(&context->radeon);
unsigned int uSQ_VTX_CONSTANT_WORD0_0;
@ -194,18 +193,8 @@ static void r700SetupVTXConstants(GLcontext * ctx,
else
r700SyncSurf(context, paos->bo, RADEON_GEM_DOMAIN_GTT, 0, VC_ACTION_ENA_bit);
if(0 == pStreamDesc->stride)
{
nVBsize = paos->count * pStreamDesc->size * getTypeSize(pStreamDesc->type);
}
else
{
nVBsize = (paos->count - 1) * pStreamDesc->stride
+ pStreamDesc->size * getTypeSize(pStreamDesc->type);
}
uSQ_VTX_CONSTANT_WORD0_0 = paos->offset;
uSQ_VTX_CONSTANT_WORD1_0 = nVBsize - 1;
uSQ_VTX_CONSTANT_WORD1_0 = paos->bo->size - paos->offset - 1;
SETfield(uSQ_VTX_CONSTANT_WORD2_0, 0, BASE_ADDRESS_HI_shift, BASE_ADDRESS_HI_mask); /* TODO */
SETfield(uSQ_VTX_CONSTANT_WORD2_0, pStreamDesc->stride, SQ_VTX_CONSTANT_WORD2_0__STRIDE_shift,

1
src/mesa/drivers/dri/r600/r700_render.c
View file

@ -644,6 +644,7 @@ static void r700SetupStreams(GLcontext *ctx, const struct gl_client_array *input
#endif
)
{
assert(count);
r700ConvertAttrib(ctx, count, input[i], &context->stream_desc[index]);
}
else