freedreno: Un-inline buffer-mask enum

Also, fix obsolete comment.

Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/21846>

src/gallium/drivers/freedreno/a2xx/fd2_draw.c

@@ -552,7 +552,7 @@ fd2_clear_fast(struct fd_context *ctx, unsigned buffers,
 }
 
 static bool
-fd2_clear(struct fd_context *ctx, unsigned buffers,
+fd2_clear(struct fd_context *ctx, enum fd_buffer_mask buffers,
           const union pipe_color_union *color, double depth,
           unsigned stencil) assert_dt
 {
@@ -564,7 +564,7 @@ fd2_clear(struct fd_context *ctx, unsigned buffers,
 
    /* set clear value */
    if (is_a20x(ctx->screen)) {
-      if (buffers & PIPE_CLEAR_COLOR) {
+      if (buffers & FD_BUFFER_COLOR) {
          /* C0 used by fragment shader */
          OUT_PKT3(ring, CP_SET_CONSTANT, 5);
          OUT_RING(ring, 0x00000480);
@@ -574,7 +574,7 @@ fd2_clear(struct fd_context *ctx, unsigned buffers,
          OUT_RING(ring, color->ui[3]);
       }
 
-      if (buffers & PIPE_CLEAR_DEPTH) {
+      if (buffers & FD_BUFFER_DEPTH) {
          /* use viewport to set depth value */
          OUT_PKT3(ring, CP_SET_CONSTANT, 3);
          OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VPORT_ZSCALE));
@@ -582,7 +582,7 @@ fd2_clear(struct fd_context *ctx, unsigned buffers,
          OUT_RING(ring, fui(depth));
       }
 
-      if (buffers & PIPE_CLEAR_STENCIL) {
+      if (buffers & FD_BUFFER_STENCIL) {
          OUT_PKT3(ring, CP_SET_CONSTANT, 3);
          OUT_RING(ring, CP_REG(REG_A2XX_RB_STENCILREFMASK_BF));
          OUT_RING(ring, 0xff000000 |
@@ -593,18 +593,18 @@ fd2_clear(struct fd_context *ctx, unsigned buffers,
                            A2XX_RB_STENCILREFMASK_STENCILWRITEMASK(0xff));
       }
    } else {
-      if (buffers & PIPE_CLEAR_COLOR) {
+      if (buffers & FD_BUFFER_COLOR) {
          OUT_PKT3(ring, CP_SET_CONSTANT, 2);
          OUT_RING(ring, CP_REG(REG_A2XX_CLEAR_COLOR));
          OUT_RING(ring, pack_rgba(PIPE_FORMAT_R8G8B8A8_UNORM, color->f));
       }
 
-      if (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
+      if (buffers & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) {
          uint32_t clear_mask, depth_clear;
          switch (fd_pipe2depth(fb->zsbuf->format)) {
          case DEPTHX_24_8:
-            clear_mask = ((buffers & PIPE_CLEAR_DEPTH) ? 0xe : 0) |
-                         ((buffers & PIPE_CLEAR_STENCIL) ? 0x1 : 0);
+            clear_mask = ((buffers & FD_BUFFER_DEPTH) ? 0xe : 0) |
+                         ((buffers & FD_BUFFER_STENCIL) ? 0x1 : 0);
             depth_clear =
                (((uint32_t)(0xffffff * depth)) << 8) | (stencil & 0xff);
             break;

src/gallium/drivers/freedreno/a5xx/fd5_draw.c

@@ -248,20 +248,20 @@ fd5_clear_lrz(struct fd_batch *batch, struct fd_resource *zsbuf, double depth)
 }
 
 static bool
-fd5_clear(struct fd_context *ctx, unsigned buffers,
+fd5_clear(struct fd_context *ctx, enum fd_buffer_mask buffers,
           const union pipe_color_union *color, double depth,
           unsigned stencil) assert_dt
 {
    struct fd_ringbuffer *ring = ctx->batch->draw;
    struct pipe_framebuffer_state *pfb = &ctx->batch->framebuffer;
 
-   if ((buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) &&
+   if ((buffers & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL)) &&
        is_z32(pfb->zsbuf->format))
       return false;
 
    fd5_emit_render_cntl(ctx, true, false);
 
-   if (buffers & PIPE_CLEAR_COLOR) {
+   if (buffers & FD_BUFFER_COLOR) {
       for (int i = 0; i < pfb->nr_cbufs; i++) {
          union util_color uc = {0};
 
@@ -321,14 +321,14 @@ fd5_clear(struct fd_context *ctx, unsigned buffers,
       }
    }
 
-   if (pfb->zsbuf && (buffers & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
+   if (pfb->zsbuf && (buffers & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL))) {
       uint32_t clear = util_pack_z_stencil(pfb->zsbuf->format, depth, stencil);
       uint32_t mask = 0;
 
-      if (buffers & PIPE_CLEAR_DEPTH)
+      if (buffers & FD_BUFFER_DEPTH)
          mask |= 0x1;
 
-      if (buffers & PIPE_CLEAR_STENCIL)
+      if (buffers & FD_BUFFER_STENCIL)
          mask |= 0x2;
 
       OUT_PKT4(ring, REG_A5XX_RB_BLIT_CNTL, 1);
@@ -343,7 +343,7 @@ fd5_clear(struct fd_context *ctx, unsigned buffers,
 
       fd5_emit_blit(ctx->batch, ring);
 
-      if (pfb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {
+      if (pfb->zsbuf && (buffers & FD_BUFFER_DEPTH)) {
          struct fd_resource *zsbuf = fd_resource(pfb->zsbuf->texture);
          if (zsbuf->lrz) {
             zsbuf->lrz_valid = true;

src/gallium/drivers/freedreno/a6xx/fd6_draw.c

@@ -541,7 +541,7 @@ is_z32(enum pipe_format format)
 }
 
 static bool
-fd6_clear(struct fd_context *ctx, unsigned buffers,
+fd6_clear(struct fd_context *ctx, enum fd_buffer_mask buffers,
           const union pipe_color_union *color, double depth,
           unsigned stencil) assert_dt
 {
@@ -556,7 +556,7 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
    if (ctx->batch->num_draws > 0)
       return false;
 
-   if (has_depth && (buffers & PIPE_CLEAR_DEPTH)) {
+   if (has_depth && (buffers & FD_BUFFER_DEPTH)) {
       struct fd_resource *zsbuf = fd_resource(pfb->zsbuf->texture);
       if (zsbuf->lrz && !is_z32(pfb->zsbuf->format)) {
          zsbuf->lrz_valid = true;
@@ -571,9 +571,9 @@ fd6_clear(struct fd_context *ctx, unsigned buffers,
 
    u_foreach_bit (i, color_buffers)
       ctx->batch->clear_color[i] = *color;
-   if (buffers & PIPE_CLEAR_DEPTH)
+   if (buffers & FD_BUFFER_DEPTH)
       ctx->batch->clear_depth = depth;
-   if (buffers & PIPE_CLEAR_STENCIL)
+   if (buffers & FD_BUFFER_STENCIL)
       ctx->batch->clear_stencil = stencil;
 
    ctx->batch->fast_cleared |= buffers;

src/gallium/drivers/freedreno/freedreno_batch.h

@@ -70,20 +70,13 @@ struct fd_batch {
     * restore.  Masks of PIPE_CLEAR_*
     *
     * The 'cleared' bits will be set for buffers which are *entirely*
-    * cleared, and 'partial_cleared' bits will be set if you must
-    * check cleared_scissor.
+    * cleared.
     *
     * The 'invalidated' bits are set for cleared buffers, and buffers
     * where the contents are undefined, ie. what we don't need to restore
     * to gmem.
     */
-   enum {
-      /* align bitmask values w/ PIPE_CLEAR_*.. since that is convenient.. */
-      FD_BUFFER_COLOR = PIPE_CLEAR_COLOR,
-      FD_BUFFER_DEPTH = PIPE_CLEAR_DEPTH,
-      FD_BUFFER_STENCIL = PIPE_CLEAR_STENCIL,
-      FD_BUFFER_ALL = FD_BUFFER_COLOR | FD_BUFFER_DEPTH | FD_BUFFER_STENCIL,
-   } invalidated, cleared, fast_cleared, restore, resolve;
+   BITMASK_ENUM(fd_buffer_mask) invalidated, cleared, fast_cleared, restore, resolve;
 
    /* is this a non-draw batch (ie compute/blit which has no pfb state)? */
    bool nondraw : 1;

src/gallium/drivers/freedreno/freedreno_context.h

@@ -192,6 +192,14 @@ enum fd_dirty_shader_state {
 #define NUM_DIRTY_SHADER_BITS 5
 };
 
+enum fd_buffer_mask {
+   /* align bitmask values w/ PIPE_CLEAR_*.. since that is convenient.. */
+   FD_BUFFER_COLOR = PIPE_CLEAR_COLOR,
+   FD_BUFFER_DEPTH = PIPE_CLEAR_DEPTH,
+   FD_BUFFER_STENCIL = PIPE_CLEAR_STENCIL,
+   FD_BUFFER_ALL = FD_BUFFER_COLOR | FD_BUFFER_DEPTH | FD_BUFFER_STENCIL,
+};
+
 #define MAX_HW_SAMPLE_PROVIDERS 7
 struct fd_hw_sample_provider;
 struct fd_hw_sample;
@@ -494,7 +502,7 @@ struct fd_context {
                      const struct pipe_draw_start_count_bias *draws,
                      unsigned num_draws,
                      unsigned index_offset) dt;
-   bool (*clear)(struct fd_context *ctx, unsigned buffers,
+   bool (*clear)(struct fd_context *ctx, enum fd_buffer_mask buffers,
                  const union pipe_color_union *color, double depth,
                  unsigned stencil) dt;